SN74LV174ADR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 5 days ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 16 |
| Weight | 141.690917mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74LV |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 2V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.5V |
| Base Part Number | 74LV174 |
| Function | Master Reset |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 7 |
| Load Capacitance | 50pF |
| Output Current | 12mA |
| Clock Frequency | 180MHz |
| Propagation Delay | 20.6 ns |
| Quiescent Current | 20μA |
| Turn On Delay Time | 3 ns |
| Family | LV/LV-A/LVX/H |
| Logic Function | D-Type, Flip-Flop |
| Current - Output High, Low | 12mA 12mA |
| Number of Bits per Element | 6 |
| Max Propagation Delay @ V, Max CL | 9.2ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 1.7pF |
| Number of Input Lines | 2 |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 50000000Hz |
| Height | 1.75mm |
| Length | 9.9mm |
| Width | 3.91mm |
| Thickness | 1.58mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LV174ADR Overview
The item is packaged in 16-SOIC (0.154, 3.90mm Width)cases. You can find it in the Cut Tape (CT)package. Currently, the output is configured to use Non-Inverted. The trigger it is configured with uses Positive Edge. There is an electric part mounted in the way of Surface Mount. With a supply voltage of 2V~5.5V volts, it operates. Currently, the operating temperature is -40°C~85°C TA. This logic flip flop is classified as type D-Type. FPGAs belonging to the 74LVseries contain this type of chip. This D flip flop should not have a frequency greater than 180MHz. There are 1 elements in it. Currently, there are 16 terminations. It is a member of the 74LV174 family. A voltage of 2.5V provides power to the D latch. JK flip flop input capacitance is 1.7pF farads. The electronic device belongs to the LV/LV-A/LVX/Hfamily. This electronic part is mounted in the way of Surface Mount. The 16pins are designed into the board. In this device, the clock edge trigger type is Positive Edge. There is a FF/Latchesbase part number assigned to the RS flip flops. It reaches the maximum supply voltage (Vsup) at 5.5V. Keeping the supply voltage (Vsup) above 2V is necessary for normal operation. Using 7 circuits, it is highly flexible. In view of its reliability, this D flip flop is a good fit for TR. It runs on 3.3Vvolts of power. Featuring the maximum design flexibility, it has an output current of 12mA . 2input lines are available for you to choose from. There is a consumption of 20μAof quiescent current from it.
SN74LV174ADR Features
Cut Tape (CT) package
74LV series
16 pins
3.3V power supplies
SN74LV174ADR Applications
There are a lot of Texas Instruments SN74LV174ADR Flip Flops applications.
- Convert a momentary switch to a toggle switch
- Automotive
- Test & Measurement
- Power down protection
- Reduced system switching noise
- Set-reset capability
- ESD protection
- Matched Rise and Fall
- Shift registers
- Buffered Clock
