SN74LVTH374DWR
| Parameters | |
|---|---|
| Max Propagation Delay @ V, Max CL | 4.5ns @ 3.3V, 50pF |
| Prop. Delay@Nom-Sup | 4.5 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| Power Supply Current-Max (ICC) | 5mA |
| Number of Output Lines | 3 |
| Count Direction | UNIDIRECTIONAL |
| Clock Edge Trigger Type | Positive Edge |
| Translation | N/A |
| Height | 2.65mm |
| Length | 12.8mm |
| Width | 7.5mm |
| Thickness | 2.35mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 5 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Number of Pins | 20 |
| Weight | 500.709277mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVTH |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | BICMOS |
| Voltage - Supply | 2.7V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Base Part Number | 74LVTH374 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Operating Supply Voltage | 3.3V |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Min (Vsup) | 2.7V |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 64mA |
| Number of Bits | 8 |
| Clock Frequency | 150MHz |
| Propagation Delay | 5.6 ns |
| Turn On Delay Time | 2.9 ns |
| Family | LVT |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 190μA |
| Current - Output High, Low | 32mA 64mA |
| Max I(ol) | 0.064 A |
SN74LVTH374DWR Overview
The flip flop is packaged in a case of 20-SOIC (0.295, 7.50mm Width). Package Tape & Reel (TR)embeds it. Tri-State, Non-Invertedis the output configured for it. It is configured with the trigger Positive Edge. Surface Mountmounts this electrical part. Powered by a 2.7V~3.6Vvolt supply, it operates as follows. Currently, the operating temperature is -40°C~85°C TA. D-Typedescribes this flip flop. JK flip flop is a part of the 74LVTHseries of FPGAs. It should not exceed 150MHzin its output frequency. D latch consists of 1 elements. It consumes 190μA of quiescent current without being affected by external factors. 20terminations have occurred. Members of the 74LVTH374family make up this object. An input voltage of 3.3Vpowers the D latch. There is 3pF input capacitance for this T flip flop. In terms of electronic devices, this device belongs to the LVTfamily of devices. It is mounted in the way of Surface Mount. This board has 20 pins. Its clock edge trigger type is Positive Edge. This device has the base part number FF/Latches. 8bits are used in its design. A normal operating voltage (Vsup) should remain above 2.7V. Due to its superior flexibility, it uses 8 circuits. In light of its reliable performance, this T flip flop is well suited for TR. The flip flop has 2embedded ports. Optimal efficiency requires a supply voltage of 3.3V. In addition to its maximum design flexibility, the output current of the T flip flop is 64mA. In order to operate, the chip has 3 output lines.
SN74LVTH374DWR Features
Tape & Reel (TR) package
74LVTH series
20 pins
8 Bits
SN74LVTH374DWR Applications
There are a lot of Texas Instruments SN74LVTH374DWR Flip Flops applications.
- Circuit Design
- Bounce elimination switch
- Consumer
- Storage registers
- ATE
- Set-reset capability
- Convert a momentary switch to a toggle switch
- Pattern generators
- Single Down Count-Control Line
- Buffer registers
