Parameters |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 3 days ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-SOIC (0.209, 5.30mm Width) |
Number of Pins |
20 |
Weight |
266.712314mg |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74LVTH |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
ECCN Code |
EAR99 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
TR |
Technology |
BICMOS |
Voltage - Supply |
2.7V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
3.3V |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
74LVTH574 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Operating Supply Voltage |
3.3V |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Min (Vsup) |
2.7V |
Number of Circuits |
8 |
Load Capacitance |
50pF |
Number of Ports |
2 |
Output Current |
64mA |
Number of Bits |
8 |
Clock Frequency |
150MHz |
Propagation Delay |
3 ns |
Turn On Delay Time |
3 ns |
Family |
LVT |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
190μA |
Current - Output High, Low |
32mA 64mA |
Max I(ol) |
0.064 A |
Max Propagation Delay @ V, Max CL |
4.5ns @ 3.3V, 50pF |
Prop. Delay@Nom-Sup |
4.5 ns |
Trigger Type |
Positive Edge |
Input Capacitance |
3pF |
Power Supply Current-Max (ICC) |
5mA |
Number of Output Lines |
3 |
Count Direction |
UNIDIRECTIONAL |
Clock Edge Trigger Type |
Positive Edge |
Height |
2mm |
Length |
12.6mm |
Width |
5.3mm |
Thickness |
1.95mm |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
SN74LVTH574NSR Overview
20-SOIC (0.209, 5.30mm Width)is the packaging method. It is contained within the Tape & Reel (TR)package. There is a Tri-State, Non-Invertedoutput configured with it. It is configured with a trigger that uses Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. With a supply voltage of 2.7V~3.6V volts, it operates. A temperature of -40°C~85°C TAis considered to be the operating temperature. Logic flip flops of this type are classified as D-Type. In this case, it is a type of FPGA belonging to the 74LVTH series. It should not exceed 150MHzin its output frequency. A total of 1 elements are present. As a result, it consumes 190μA of quiescent current without being affected by external factors. It has been determined that there have been 20 terminations. You can search similar parts based on 74LVTH574. The D flip flop is powered by a voltage of 3.3V . The input capacitance of this T flip flop is 3pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. It is a member of the LVTfamily of D flip flop. There is an electronic part mounted in the way of Surface Mount. The 20pins are designed into the board. This device has Positive Edgeas its clock edge trigger type. It is part of the FF/Latchesbase part number family. It is designed with 8bits. It is imperative that the supply voltage (Vsup) is maintained above 2.7Vin order to ensure normal operation. The superior flexibility of this circuit is achieved by using 8 circuits. Considering the reliability of this T flip flop, it is well suited for TR. This D flip flop is equipped with 0 ports. In order to achieve high efficiency, the supply voltage should be maintained at 3.3V. As a result of its output current of 64mA, it is very flexible in terms of design. In order for the chip to function, it has 3output lines.
SN74LVTH574NSR Features
Tape & Reel (TR) package
74LVTH series
20 pins
8 Bits
SN74LVTH574NSR Applications
There are a lot of Texas Instruments SN74LVTH574NSR Flip Flops applications.
- Buffered Clock
- Divide a clock signal by 2 or 4
- Load Control
- Parallel data storage
- Computing
- Clock pulse
- Communications
- ATE
- Bounce elimination switch
- Patented noise