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1SX250LN3F43E2VG

0°C~100°C TJ System On ChipStratix? 10 SX Series 688 I/O


  • Manufacturer: Intel
  • Nocochips NO: 386-1SX250LN3F43E2VG
  • Package: 1760-BBGA, FCBGA
  • Datasheet: PDF
  • Stock: 982
  • Description: 0°C~100°C TJ System On ChipStratix? 10 SX Series 688 I/O(Kg)

Details

Tags

Parameters
Factory Lead Time 1 Week
Package / Case 1760-BBGA, FCBGA
Operating Temperature 0°C~100°C TJ
Packaging Tray
Series Stratix® 10 SX
Part Status Active
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of I/O 688
Speed 1.5GHz
RAM Size 256KB
uPs/uCs/Peripheral ICs Type MICROPROCESSOR CIRCUIT
Core Processor Quad ARM® Cortex®-A53 MPCore™ with CoreSight™
Peripherals DMA, WDT
Connectivity EBI/EMI, Ethernet, I2C, MMC/SD/SDIO, SPI, UART/USART, USB OTG
Architecture MCU, FPGA
Primary Attributes FPGA - 2500K Logic Elements
RoHS Status RoHS Compliant

This SoC is built on Quad ARM? Cortex?-A53 MPCore? with CoreSight? core processor(s).


This SoC is built on Quad ARM? Cortex?-A53 MPCore? with CoreSight? core processor(s).Its package is 1760-BBGA, FCBGA.A SoC chip with 256KB RAM is provided for users to enjoy reliable performance.When it comes to internal architecture, this SoC design employs the MCU, FPGA technique.A system on chip SoC of this type belongs to the Stratix? 10 SX series.The average operating temps for this SoC meaning should be 0°C~100°C TJ.This SoC security combines FPGA - 2500K Logic Elements and that is something to note.Housed in the state-of-art Tray package.As a whole, this SoC part is comprised of 688 inputs and outputs.MICROPROCESSOR CIRCUIT is used as the uPs, uCs, peripheral SoCs (any or all of them) for the board.

Quad ARM? Cortex?-A53 MPCore? with CoreSight? processor.


256KB RAM.
Built on MCU, FPGA.
MICROPROCESSOR CIRCUIT

There are a lot of Intel


1SX250LN3F43E2VG System On Chip (SoC) applications.

  • Smartphone accessories
  • Mobile market
  • Automated sorting equipment
  • Servo drive control module
  • Efficient hardware for training of neural networks
  • Three phase UPS
  • Avionics
  • Fitness
  • Efficient hardware for inference of neural networks
  • Published Paper

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