5962-8867004KA
| Parameters | |
|---|---|
| Surface Mount | YES |
| JESD-609 Code | e0 |
| Number of Terminations | 24 |
| ECCN Code | 3A001.A.2.C |
| Terminal Finish | Tin/Lead (Sn/Pb) - hot dipped |
| Additional Feature | 10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK; VARIABLE PRODUCT TERMS |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | DUAL |
| Terminal Form | FLAT |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 5V |
| Terminal Pitch | 1.27mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Pin Count | 24 |
| JESD-30 Code | R-GDFP-F24 |
| Number of Outputs | 10 |
| Qualification Status | Not Qualified |
| Operating Temperature (Max) | 125°C |
| Operating Temperature (Min) | -55°C |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 5V |
| Temperature Grade | MILITARY |
| Supply Voltage-Min (Vsup) | 4.5V |
| Number of I/O | 10 |
| Clock Frequency | 31.2MHz |
| Propagation Delay | 20 ns |
| Architecture | PAL-TYPE |
| Number of Inputs | 22 |
| Organization | 11 DEDICATED INPUTS, 10 I/O |
| Programmable Logic Type | OT PLD |
| Screening Level | MIL-STD-883 |
| Output Function | MACROCELL |
| Number of Dedicated Inputs | 11 |
| Number of Product Terms | 132 |
| Height Seated (Max) | 2.286mm |
| Length | 15.367mm |
| Width | 9.652mm |
| RoHS Status | RoHS Compliant |
5962-8867004KA Overview
As a result, it has 10 I/O ports programmed.There are 24 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line.As the terminal position of this electrical part is [0], it serves as an important access point for passengers or freight.Power is provided by a supply voltage of 5V volts.There is a part in the family [0].It has 24pins programmed.It is also characterized by 10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK; VARIABLE PRODUCT TERMS.The system runs on a power supply of 5V watts.There is a maximum supply voltage (Vsup) of 5.5V.It has 11dedicated inputs for detecting input signals.It is recommended that the supply voltage (Vsup) be greater than 4.5V.It is recommended that the clock frequency not exceed 31.2MHz.In programmable logic, a type of logic can be categorized as OT PLD.This device is configured with a 10 output.The product is equipped with 132terms.Keep the operating temperature below 125°C.It employs 22 inputs.There should be at least -55°Cin the operating temperature.
5962-8867004KA Features
10 I/Os
24 pin count
5V power supplies
10 outputs
5962-8867004KA Applications
There are a lot of Cypress Semiconductor 5962-8867004KA CPLDs applications.
- Page register
- Interface bridging
- I2C BUS INTERFACE
- D/T registers and latches
- Multiple Clock Source Selection
- DMA control
- Custom state machines
- Programmable polarity
- Preset swapping
- Discrete logic functions
