Parameters |
Surface Mount |
NO |
Published |
2001 |
JESD-609 Code |
e0 |
Number of Terminations |
20 |
ECCN Code |
3A001.A.2.C |
Terminal Finish |
TIN LEAD |
Additional Feature |
1 EXTERNAL CLOCK |
HTS Code |
8542.39.00.01 |
Technology |
CMOS |
Terminal Position |
DUAL |
Terminal Form |
THROUGH-HOLE |
Supply Voltage |
5V |
Terminal Pitch |
2.54mm |
Pin Count |
20 |
JESD-30 Code |
R-GDIP-T20 |
Qualification Status |
Not Qualified |
Operating Temperature (Max) |
125°C |
Operating Temperature (Min) |
-55°C |
Supply Voltage-Max (Vsup) |
5.5V |
Temperature Grade |
MILITARY |
Supply Voltage-Min (Vsup) |
4.5V |
Number of I/O |
2 |
Clock Frequency |
28.5MHz |
Propagation Delay |
20 ns |
Organization |
8 DEDICATED INPUTS, 2 I/O |
Programmable Logic Type |
OT PLD |
Output Function |
MIXED |
Number of Dedicated Inputs |
8 |
Height Seated (Max) |
5.08mm |
Length |
24.13mm |
Width |
7.62mm |
RoHS Status |
RoHS Compliant |
5962-8871311RA Overview
The device is programmed with 2 I/Os.It is programmed that device terminations will be 20 .Its terminal position is DUAL.It is powered from a supply voltage of 5V.It is programmed with 20 pins.Additionally, this device is capable of displaying [0].A maximum supply voltage (Vsup) of 5.5V is provided.The status of input signals is determined by 8dedicated inputs.Voltage supply (Vsup) should be higher than 4.5V.A frequency of 28.5MHzshould not be exceeded by its clock.A programmable logic type is classified as OT PLD.It is recommended that the operating temperature be kept below 125°C.Temperatures should be maintained at least at [0].
5962-8871311RA Features
2 I/Os
20 pin count
5962-8871311RA Applications
There are a lot of Cypress Semiconductor 5962-8871311RA CPLDs applications.
- USB Bus
- DDC INTERFACE
- Cross-Matrix Switch
- I/O PORTS (MCU MODULE)
- Software-driven hardware configuration
- I/O expansion
- POWER-SAVING MODES
- Wide Vin Industrial low power SMPS
- Storage Cards and Storage Racks
- Auxiliary Power Supply Isolated and Non-isolated