Parameters |
Factory Lead Time |
1 Week |
Mount |
Surface Mount |
Package / Case |
QFP |
Number of Pins |
64 |
Published |
2003 |
JESD-609 Code |
e3 |
Pbfree Code |
yes |
Part Status |
Active |
Number of Terminations |
64 |
ECCN Code |
EAR99 |
Terminal Finish |
MATTE TIN |
Max Operating Temperature |
85°C |
Min Operating Temperature |
0°C |
Additional Feature |
YES |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
1.8V |
Time@Peak Reflow Temperature-Max (s) |
30 |
Pin Count |
64 |
Operating Supply Voltage |
1.8V |
Temperature Grade |
OTHER |
Max Supply Voltage |
1.89V |
Min Supply Voltage |
1.71V |
Memory Size |
1kB |
Operating Supply Current |
25μA |
Number of I/O |
54 |
Nominal Supply Current |
25μA |
Memory Type |
FLASH |
Propagation Delay |
7.9 ns |
Frequency (Max) |
152MHz |
Number of Logic Elements/Cells |
160 |
Number of Programmable I/O |
54 |
Number of Logic Blocks (LABs) |
8 |
Speed Grade |
4 |
Output Function |
MACROCELL |
Number of Macro Cells |
128 |
JTAG BST |
YES |
In-System Programmable |
YES |
Height |
1.05mm |
Length |
7mm |
Width |
7mm |
Radiation Hardening |
No |
RoHS Status |
RoHS Compliant |
5M160ZE64C4N Overview
This network has 128macro cells, which are cells that provide radio coverage provided by a high-power cell site (tower, antenna, mast).You can find it in package [0].There are 54 I/Os programmed in it.64terminations have been programmed into the device.This electrical part is wired with a terminal position of QUAD.Power is provided by a supply voltage of 1.8V volts.This part is part of the family [0].There are 64pins on the chip.It is also possible to find YESwhen using this device.It is recommended that the supply voltage be kept at 1.8Vto maximize efficiency.For storing data, it is recommended to use [0].The electronic component is mounted by Surface Mount.This board has 64 pins.With a maximum supply voltage of [0], it operates.Normally, it operates with a voltage of 1.71VV as its minimum supply voltage.There are 54 programmable I/Os, which are method of data transmissions, via input/output (I/O), between a central processing unit (CPU) and a peripheral device, such as a network adapter or a Parallel ATA storage device. There should be a temperature above 0°Cat the time of operation.The operating temperature should be lower than 85°C.In total, it contains 8 logic blocks (LABs).In order to form a fundamental building block, there are 160logic elements/cells.If the maximal frequency is less than [0], it should be lower than that.In the devices, there is a memory of 1kBthat can be used to store programs and data.
5M160ZE64C4N Features
QFP package
54 I/Os
64 pin count
64 pins
8 logic blocks (LABs)
5M160ZE64C4N Applications
There are a lot of Altera 5M160ZE64C4N CPLDs applications.
- Page register
- Wide Vin Industrial low power SMPS
- Field programmable gate
- Programmable power management
- ON-CHIP OSCILLATOR CIRCUIT
- Portable digital devices
- Timing control
- ToR/Aggregation/Core Switch and Router
- Auxiliary Power Supply Isolated and Non-isolated
- Software-Driven Hardware Configuration