Parameters |
Factory Lead Time |
1 Week |
Mount |
Surface Mount |
Package / Case |
QFP |
Number of Pins |
64 |
Weight |
1.764389g |
Published |
2003 |
JESD-609 Code |
e3 |
Pbfree Code |
yes |
Part Status |
Active |
Number of Terminations |
64 |
ECCN Code |
EAR99 |
Terminal Finish |
MATTE TIN |
Max Operating Temperature |
100°C |
Min Operating Temperature |
-40°C |
Additional Feature |
YES |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
GULL WING |
Supply Voltage |
1.8V |
Terminal Pitch |
0.4mm |
Frequency |
1.4749GHz |
Pin Count |
64 |
Operating Supply Voltage |
1.8V |
Temperature Grade |
INDUSTRIAL |
Max Supply Voltage |
1.89V |
Min Supply Voltage |
1.71V |
Memory Size |
1kB |
Operating Supply Current |
25μA |
Number of I/O |
54 |
Memory Type |
FLASH |
Propagation Delay |
7.5 ns |
Frequency (Max) |
152MHz |
Number of Logic Elements/Cells |
160 |
Number of Logic Blocks (LABs) |
8 |
Speed Grade |
5 |
Output Function |
MACROCELL |
Number of Macro Cells |
128 |
JTAG BST |
YES |
In-System Programmable |
YES |
Height Seated (Max) |
1.2mm |
Length |
7mm |
Width |
7mm |
Radiation Hardening |
No |
RoHS Status |
RoHS Compliant |
5M160ZE64I5N Overview
A mobile phone network consists of 128macro cells, which are radio coverage cells served by a high-power cell site (tower, antenna or mast).It is part of the QFP package.There are 54 I/Os on the board.Terminations of devices are set to [0].Its terminal position is QUAD.The power supply voltage is 1.8V.The part belongs to Programmable Logic Devices family.In this chip, the 64pins are programmed.If this device is used, you will also be able to find [0].The supply voltage should be maintained at 1.8V for high efficiency.For storing data, it is recommended to use [0].The electronic component is mounted by Surface Mount.The device has a pinout of [0].In this case, the maximum supply voltage is 1.89V.A minimum supply voltage of 1.71V is required for this device to operate.There is a maximum frequency of 1.4749GHz.It is recommended that the operating temperature be greater than -40°C.There should be a temperature below 100°Cat the time of operation.The system consists of 8 logic blocks (LABs).Fundamental building blocks consist of 160logic elements/cells.A maximum frequency of less than 152MHzis recommended.Devices include a memory of 1kBavailable for the storage of programs and data.
5M160ZE64I5N Features
QFP package
54 I/Os
64 pin count
64 pins
8 logic blocks (LABs)
5M160ZE64I5N Applications
There are a lot of Altera 5M160ZE64I5N CPLDs applications.
- ON-CHIP OSCILLATOR CIRCUIT
- Synchronous or asynchronous mode
- Network Interface Card (NIC) and Host Bus Adapter (HBA)
- Power automation
- Handheld digital devices
- Cross-Matrix Switch
- D/T registers and latches
- Power up sequencing
- Software-driven hardware configuration
- Protection relays