Parameters |
Mount |
Surface Mount |
Package / Case |
TFBGA |
Number of Pins |
100 |
JESD-609 Code |
e0 |
Pbfree Code |
no |
Number of Terminations |
100 |
Terminal Finish |
TIN LEAD |
Max Operating Temperature |
85°C |
Min Operating Temperature |
0°C |
Additional Feature |
YES |
HTS Code |
8542.39.00.01 |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
BOTTOM |
Terminal Form |
BALL |
Peak Reflow Temperature (Cel) |
235 |
Supply Voltage |
1.8V |
Terminal Pitch |
0.5mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Pin Count |
100 |
Qualification Status |
Not Qualified |
Supply Voltage-Max (Vsup) |
1.89V |
Power Supplies |
1.2/3.31.8V |
Temperature Grade |
OTHER |
Supply Voltage-Min (Vsup) |
1.71V |
Number of I/O |
79 |
Clock Frequency |
184.1MHz |
Propagation Delay |
7.9 ns |
Programmable Logic Type |
FLASH PLD |
Number of Logic Blocks (LABs) |
160 |
Output Function |
MACROCELL |
Number of Macro Cells |
128 |
JTAG BST |
YES |
In-System Programmable |
YES |
Height Seated (Max) |
1.2mm |
Length |
6mm |
Width |
6mm |
RoHS Status |
RoHS Compliant |
5M160ZM100C4 Overview
In the mobile phone network, there are 128macro cells, which are cells with high-power antennas and towers.The item is enclosed in a TFBGA package.There are 79 I/Os programmed in it.There are 100 terminations programmed into the device.As the terminal position of this electrical part is [0], it serves as an important access point for passengers or freight.There is 1.8V voltage supply for this device.The part belongs to Programmable Logic Devices family.A chip with 100pins is programmed.This device can also display [0].A Surface Mountis mounted on this electronic component.There are 100pins on it.It runs on a voltage of 1.2/3.31.8Vvolts.The maximal supply voltage (Vsup) reaches 1.89V.It is recommended that the operating temperature exceed 0°C.A temperature lower than 85°Cis recommended for operation.It is composed of 160 logic blocks (LABs).It is recommended that the supply voltage (Vsup) be greater than 1.71V.Ideally, its clock frequency should not exceed 184.1MHz.There is a type of programmable logic called FLASH PLD.
5M160ZM100C4 Features
TFBGA package
79 I/Os
100 pin count
100 pins
1.2/3.31.8V power supplies
160 logic blocks (LABs)
5M160ZM100C4 Applications
There are a lot of Altera 5M160ZM100C4 CPLDs applications.
- Power automation
- I/O PORTS (MCU MODULE)
- Address decoders
- Custom shift registers
- ToR/Aggregation/Core Switch and Router
- Programmable power management
- Page register
- Address decoding
- DMA control
- ANALOG-TO-DIGITAL CONVERTOR (ADC)