Parameters |
Mount |
Surface Mount |
Package / Case |
TFBGA |
Number of Pins |
100 |
JESD-609 Code |
e0 |
Pbfree Code |
no |
Number of Terminations |
100 |
Terminal Finish |
TIN LEAD |
Max Operating Temperature |
100°C |
Min Operating Temperature |
-40°C |
Additional Feature |
YES |
HTS Code |
8542.39.00.01 |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
BOTTOM |
Terminal Form |
BALL |
Peak Reflow Temperature (Cel) |
NOT SPECIFIED |
Supply Voltage |
1.8V |
Terminal Pitch |
0.5mm |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Pin Count |
100 |
Qualification Status |
Not Qualified |
Supply Voltage-Max (Vsup) |
1.89V |
Power Supplies |
1.2/3.31.8V |
Temperature Grade |
INDUSTRIAL |
Supply Voltage-Min (Vsup) |
1.71V |
Number of I/O |
79 |
Clock Frequency |
118.3MHz |
Propagation Delay |
14 ns |
Programmable Logic Type |
FLASH PLD |
Number of Logic Blocks (LABs) |
160 |
Output Function |
MACROCELL |
Number of Macro Cells |
128 |
JTAG BST |
YES |
In-System Programmable |
YES |
Height Seated (Max) |
1.2mm |
Length |
6mm |
Width |
6mm |
RoHS Status |
RoHS Compliant |
5M160ZM100I5 Overview
In the mobile phone network, there are 128macro cells, which are cells with high-power antennas and towers.A TFBGA package contains the item.The device is programmed with 79 I/O ports.It is programmed to terminate devices at [0].The terminal position of this electrical component is BOTTOM.The power source is powered by 1.8Vvolts.The part belongs to Programmable Logic Devices family.It has 100pins programmed.Additionally, this device is capable of displaying [0].A Surface Mountis mounted on this electronic component.There are 100pins on it.A total of 1.2/3.31.8V power supplies are needed to run it.In order to ensure proper operation, a maximum supply voltage (Vsup) of 1.89V is required.The operating temperature should be higher than -40°C.A temperature lower than 100°Cis recommended for operation.Its basic building block is composed of 160 logic blocks (LABs).A supply voltage (Vsup) of greater than 1.71V should be used.A frequency of 118.3MHzshould not be exceeded by its clock.It is possible to classify programmable logic as FLASH PLD.
5M160ZM100I5 Features
TFBGA package
79 I/Os
100 pin count
100 pins
1.2/3.31.8V power supplies
160 logic blocks (LABs)
5M160ZM100I5 Applications
There are a lot of Altera 5M160ZM100I5 CPLDs applications.
- TIMERS/COUNTERS
- Power Meter SMPS
- White goods (Washing, Cold, Aircon ,...)
- Discrete logic functions
- I/O expansion
- PULSE WIDTH MODULATION (PWM)
- Battery operated portable devices
- Address decoders
- Pattern recognition
- Code converters