Parameters |
Factory Lead Time |
1 Week |
Mount |
Surface Mount |
Package / Case |
FBGA |
Number of Pins |
324 |
Published |
2003 |
JESD-609 Code |
e1 |
Pbfree Code |
yes |
Part Status |
Active |
Number of Terminations |
324 |
ECCN Code |
3A991 |
Terminal Finish |
TIN SILVER COPPER |
Max Operating Temperature |
85°C |
Min Operating Temperature |
0°C |
Additional Feature |
YES |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
BOTTOM |
Terminal Form |
BALL |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
1.8V |
Terminal Pitch |
1mm |
Frequency |
201MHz |
Time@Peak Reflow Temperature-Max (s) |
40 |
Pin Count |
324 |
Operating Supply Voltage |
1.8V |
Temperature Grade |
OTHER |
Max Supply Voltage |
1.89V |
Min Supply Voltage |
1.71V |
Memory Size |
1kB |
Operating Supply Current |
2mA |
Number of I/O |
271 |
Nominal Supply Current |
2mA |
Memory Type |
FLASH |
Propagation Delay |
11.2 ns |
Frequency (Max) |
304MHz |
Number of Logic Elements/Cells |
2210 |
Number of Programmable I/O |
271 |
Number of Logic Blocks (LABs) |
8 |
Output Function |
MACROCELL |
Number of Macro Cells |
1700 |
JTAG BST |
YES |
In-System Programmable |
YES |
Height Seated (Max) |
1.55mm |
Length |
19mm |
Width |
19mm |
Radiation Hardening |
No |
RoHS Status |
RoHS Compliant |
5M2210ZF324C5N Overview
There are 1700 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).FBGAis the package in which it resides.It is programmed with 271 I/Os.324terminations have been programmed into the device.Its terminal position is BOTTOM.A voltage of 1.8V is used as the power supply for this device.It belongs to the family [0].With 324pins programmed, the chip is ready to use.This device is also capable of displaying [0].High efficiency requires a voltage supply of [0].It is recommended that data be stored in [0].This device is mounted by Surface Mount.There are 324 pins embedded in the device.With a maximum supply voltage of [0], it operates.Initially, it requires a voltage of 1.71Vas the minimum supply voltage.A total of 271Programmable I/Os are present.The frequency that can be achieved is 201MHz.It is recommended that the operating temperature be greater than 0°C.It is recommended that the operating temperature be below 85°C.Its basic building block is composed of 8 logic blocks (LABs).Fundamental building blocks consist of 2210logic elements/cells.The maximal frequency should be lower than 304MHz.The devices embed a memory of 1kB available for
storing programs and datas.
5M2210ZF324C5N Features
FBGA package
271 I/Os
324 pin count
324 pins
8 logic blocks (LABs)
5M2210ZF324C5N Applications
There are a lot of Altera 5M2210ZF324C5N CPLDs applications.
- Digital multiplexers
- PULSE WIDTH MODULATION (PWM)
- Dedicated input registers
- Software-Driven Hardware Configuration
- I2C BUS INTERFACE
- USB Bus
- Reset swapping
- DMA control
- Auxiliary Power Supply Isolated and Non-isolated
- ANALOG-TO-DIGITAL CONVERTOR (ADC)