5M240ZM100C4
| Parameters | |
|---|---|
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Number of Terminations | 100 |
| Terminal Finish | TIN LEAD |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | 0°C |
| Additional Feature | YES |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 235 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 100 |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 1.89V |
| Power Supplies | 1.81.2/3.3V |
| Temperature Grade | OTHER |
| Supply Voltage-Min (Vsup) | 1.71V |
| Number of I/O | 79 |
| Clock Frequency | 184.1MHz |
| Propagation Delay | 7.9 ns |
| Programmable Logic Type | FLASH PLD |
| Number of Logic Blocks (LABs) | 240 |
| Output Function | MACROCELL |
| Number of Macro Cells | 192 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height Seated (Max) | 1.2mm |
| Length | 6mm |
| Width | 6mm |
| RoHS Status | RoHS Compliant |
| Mount | Surface Mount |
| Package / Case | TFBGA |
| Number of Pins | 100 |
5M240ZM100C4 Overview
Currently, there are 192 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.The item is enclosed in a TFBGA package.This device has 79 I/O ports programmed into it.Terminations of devices are set to [0].This electrical part has a terminal position of BOTTOMand is connected to the ground.An electrical supply voltage of 1.8V is used to power it.The part is included in Programmable Logic Devices.There are 100 pins on the chip.This device also displays [0].Surface Mountis used to mount this electronic component.There are 100pins on it.It runs on a voltage of 1.81.2/3.3Vvolts.The maximal supply voltage (Vsup) reaches 1.89V.In order to operate, the temperature should be higher than 0°C.There should be a temperature below 85°Cat the time of operation.240logic blocks (LABs) make up this circuit.Ensure that the supply voltage (Vsup) exceeds 1.71V.A frequency of 184.1MHzshould not be exceeded by its clock.Programmable logic types can be divided into FLASH PLD.
5M240ZM100C4 Features
TFBGA package
79 I/Os
100 pin count
100 pins
1.81.2/3.3V power supplies
240 logic blocks (LABs)
5M240ZM100C4 Applications
There are a lot of Altera 5M240ZM100C4 CPLDs applications.
- Preset swapping
- ROM patching
- Programmable polarity
- Storage Cards and Storage Racks
- Address decoding
- Battery operated portable devices
- Page register
- Power Meter SMPS
- Digital systems
- TIMERS/COUNTERS
