Parameters |
Mount |
Surface Mount |
Package / Case |
TFBGA |
Number of Pins |
64 |
JESD-609 Code |
e0 |
Pbfree Code |
no |
Number of Terminations |
64 |
ECCN Code |
EAR99 |
Terminal Finish |
TIN LEAD |
Max Operating Temperature |
85°C |
Min Operating Temperature |
0°C |
Additional Feature |
YES |
HTS Code |
8542.39.00.01 |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
BOTTOM |
Terminal Form |
BALL |
Peak Reflow Temperature (Cel) |
235 |
Supply Voltage |
1.8V |
Terminal Pitch |
0.5mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Pin Count |
64 |
Qualification Status |
Not Qualified |
Supply Voltage-Max (Vsup) |
1.89V |
Power Supplies |
1.81.2/3.3V |
Temperature Grade |
OTHER |
Supply Voltage-Min (Vsup) |
1.71V |
Number of I/O |
30 |
Clock Frequency |
184.1MHz |
Propagation Delay |
7.9 ns |
Programmable Logic Type |
FLASH PLD |
Number of Logic Blocks (LABs) |
80 |
Output Function |
MACROCELL |
Number of Macro Cells |
64 |
JTAG BST |
YES |
In-System Programmable |
YES |
Height Seated (Max) |
1.2mm |
Length |
4.5mm |
Width |
4.5mm |
RoHS Status |
RoHS Compliant |
5M80ZM64C4 Overview
This network has 64macro cells, which are cells that provide radio coverage provided by a high-power cell site (tower, antenna, mast).It is part of the TFBGA package.As you can see, this device has 30 I/O ports programmed into it.Devices are programmed with terminations of [0].The terminal position of this electrical component is BOTTOM.It is powered from a supply voltage of 1.8V.The part belongs to Programmable Logic Devices family.The chip is programmed with 64 pins.It is also possible to find YESwhen using this device.Surface Mountis the mounting point of this electronic part.The device has a pinout of [0].It operates from 1.81.2/3.3V power supplies.In order to ensure proper operation, a maximum supply voltage (Vsup) of 1.89V is required.There should be a temperature above 0°Cat the time of operation.It is recommended that the operating temperature be lower than 85°C.In total, it contains 80 logic blocks (LABs).In order to operate properly, the supply voltage (Vsup) should be greater than 1.71V.It should not exceed 184.1MHzin its clock frequency.A programmable logic type can be categorized as FLASH PLD.
5M80ZM64C4 Features
TFBGA package
30 I/Os
64 pin count
64 pins
1.81.2/3.3V power supplies
80 logic blocks (LABs)
5M80ZM64C4 Applications
There are a lot of Altera 5M80ZM64C4 CPLDs applications.
- Bootloaders for FPGAs
- Cross-Matrix Switch
- White goods (Washing, Cold, Aircon ,...)
- ToR/Aggregation/Core Switch and Router
- Programmable power management
- Network Interface Card (NIC) and Host Bus Adapter (HBA)
- POWER-SAVING MODES
- TIMERS/COUNTERS
- Pattern recognition
- Timing control