Parameters |
Factory Lead Time |
1 Week |
Mount |
Surface Mount |
Package / Case |
TFBGA |
Number of Pins |
64 |
Published |
2003 |
JESD-609 Code |
e1 |
Pbfree Code |
yes |
Part Status |
Active |
Number of Terminations |
64 |
ECCN Code |
EAR99 |
Terminal Finish |
TIN SILVER COPPER |
Max Operating Temperature |
100°C |
Min Operating Temperature |
-40°C |
Additional Feature |
YES |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
BOTTOM |
Terminal Form |
BALL |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
1.8V |
Frequency |
1.4749GHz |
Time@Peak Reflow Temperature-Max (s) |
30 |
Pin Count |
64 |
Operating Supply Voltage |
1.8V |
Temperature Grade |
INDUSTRIAL |
Max Supply Voltage |
1.89V |
Min Supply Voltage |
1.71V |
Memory Size |
1kB |
Operating Supply Current |
25μA |
Number of I/O |
30 |
Nominal Supply Current |
25μA |
Memory Type |
FLASH |
Propagation Delay |
14 ns |
Frequency (Max) |
152MHz |
Number of Logic Elements/Cells |
80 |
Number of Programmable I/O |
30 |
Number of Logic Blocks (LABs) |
8 |
Speed Grade |
5 |
Output Function |
MACROCELL |
Number of Macro Cells |
64 |
JTAG BST |
YES |
In-System Programmable |
YES |
Height |
1.05mm |
Length |
4.5mm |
Width |
4.5mm |
Radiation Hardening |
No |
RoHS Status |
RoHS Compliant |
5M80ZM64I5N Overview
This network has 64macro cells, which are cells that provide radio coverage provided by a high-power cell site (tower, antenna, mast).It is contained in package [0].There are 30 I/Os programmed in it.It is programmed to terminate devices at [0].This electrical part has a terminal position of BOTTOMand is connected to the ground.The power supply voltage is 1.8V.There is a part included in Programmable Logic Devices.There are 64pins on the chip.The device can also be used to find [0].If high efficiency is to be achieved, the supply voltage should be maintained at [0].For data storage, FLASHis adopted.The electronic component is mounted by Surface Mount.A total of 64pins are provided on this board.It operates at a maximum supply voltage of 1.89V volts.The device is designed to operate with a minimal supply voltage of 1.71VV.There are a total of 30 Programmable I/Os.There is a maximum frequency of 1.4749GHz.In order to operate, the temperature should be higher than -40°C.A temperature below 100°Cshould be used as the operating temperature.The logic block consists of 8 l logic blocks (LABs).An elementary building block consists of 80logic elements/cells.It is recommended that the maximal frequency be less than 0.In the devices, there is a memory of 1kBthat can be used to store programs and data.
5M80ZM64I5N Features
TFBGA package
30 I/Os
64 pin count
64 pins
8 logic blocks (LABs)
5M80ZM64I5N Applications
There are a lot of Altera 5M80ZM64I5N CPLDs applications.
- ANALOG-TO-DIGITAL CONVERTOR (ADC)
- I/O expansion
- Multiple Clock Source Selection
- Digital multiplexers
- Power up sequencing
- PULSE WIDTH MODULATION (PWM)
- DDC INTERFACE
- Custom shift registers
- D/T registers and latches
- Bootloaders for FPGAs