Parameters |
Factory Lead Time |
1 Week |
Mount |
Surface Mount |
Package / Case |
TFBGA |
Number of Pins |
68 |
Published |
2003 |
JESD-609 Code |
e1 |
Pbfree Code |
yes |
Number of Terminations |
68 |
ECCN Code |
EAR99 |
Terminal Finish |
TIN SILVER COPPER |
Max Operating Temperature |
85°C |
Min Operating Temperature |
0°C |
Additional Feature |
YES |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
BOTTOM |
Terminal Form |
BALL |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
1.8V |
Frequency |
1.4749GHz |
Time@Peak Reflow Temperature-Max (s) |
40 |
Pin Count |
68 |
Operating Supply Voltage |
1.8V |
Temperature Grade |
OTHER |
Max Supply Voltage |
1.89V |
Min Supply Voltage |
1.71V |
Memory Size |
1kB |
Operating Supply Current |
25μA |
Number of I/O |
52 |
Nominal Supply Current |
25μA |
Memory Type |
FLASH |
Propagation Delay |
14 ns |
Frequency (Max) |
152MHz |
Number of Logic Elements/Cells |
80 |
Number of Programmable I/O |
52 |
Number of Logic Blocks (LABs) |
8 |
Speed Grade |
5 |
Output Function |
MACROCELL |
Number of Macro Cells |
64 |
JTAG BST |
YES |
In-System Programmable |
YES |
Height Seated (Max) |
1.2mm |
Radiation Hardening |
No |
RoHS Status |
RoHS Compliant |
Lead Free |
Lead Free |
5M80ZM68C5N Overview
This network has 64macro cells, which are cells that provide radio coverage provided by a high-power cell site (tower, antenna, mast).You can find it in package [0].It is programmed with 52 I/Os.There are 68 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line.The terminal position of this electrical part is BOTTOM, which serves as an important access point for passengers or freight.The power supply voltage is 1.8V.This part is included in Programmable Logic Devices.With 68pins programmed, the chip is ready to use.If this device is used, you will also be able to find [0].High efficiency requires a voltage supply of [0].Data storage is performed using [0].This device is mounted by Surface Mount.There are 68 pins on the device.A voltage of 1.89V is the maximum supply voltage for this device.The device is designed to operate with a minimal supply voltage of 1.71VV.There are 52 Programmable I/Os.This can be achieved at a frequency of 1.4749GHz.Operating temperatures should be higher than 0°C.The operating temperature should be lower than 85°C.In its simplest form, it consists of 8 logic blocks (LABs).Basic building blocks have 80logic elements.The maximal frequency should be lower than 152MHz.Devices are equipped with a memory capacity of 1kBfor storing programs and data.
5M80ZM68C5N Features
TFBGA package
52 I/Os
68 pin count
68 pins
8 logic blocks (LABs)
5M80ZM68C5N Applications
There are a lot of Altera 5M80ZM68C5N CPLDs applications.
- Power automation
- Handheld digital devices
- Custom state machines
- Configurable Addressing of I/O Boards
- Boolean function generators
- Programmable polarity
- STANDARD SERIAL INTERFACE UART
- Software Configuration of Add-In Boards
- Programmable power management
- POWER-SAVING MODES