74ABT273CSC
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74ABT |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | MATTE TIN |
| Technology | BICMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Reach Compliance Code | unknown |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| JESD-30 Code | R-PDSO-G20 |
| Function | Master Reset |
| Qualification Status | COMMERCIAL |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Clock Frequency | 200MHz |
| Family | ABT |
| Current - Quiescent (Iq) | 50μA |
| Current - Output High, Low | 32mA 64mA |
| Output Polarity | TRUE |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 6.8ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| Height Seated (Max) | 2.642mm |
| Width | 7.5mm |
| RoHS Status | ROHS3 Compliant |
74ABT273CSC Overview
The flip flop is packaged in 20-SOIC (0.295, 7.50mm Width). There is an embedded version in the package Tube. T flip flop uses Non-Invertedas the output. It is configured with a trigger that uses Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. A voltage of 4.5V~5.5Vis used as the supply voltage. It is at -40°C~85°C TAdegrees Celsius that the system is operating. A flip flop of this type is classified as a D-Type. In FPGA terms, D flip flop is a type of 74ABTseries FPGA. There should be no greater frequency than 200MHzon its output. There are 1 elements in it. During its operation, it consumes 50μA quiescent energy. There are 20 terminations,An input voltage of 5Vpowers the D latch. The input capacitance of this JK flip flopis 5pF farads. It is a member of the ABTfamily of D flip flop. It reaches 5.5Vwhen the supply voltage is maximal (Vsup). The supply voltage (Vsup) should be kept above 4.5V for normal operation.
74ABT273CSC Features
Tube package
74ABT series
74ABT273CSC Applications
There are a lot of Rochester Electronics, LLC 74ABT273CSC Flip Flops applications.
- CMOS Process
- Memory
- Common Clocks
- Parallel data storage
- Frequency Divider circuits
- ATE
- Functionally equivalent to the MC10/100EL29
- Circuit Design
- Reduced system switching noise
- Set-reset capability
