Parameters |
Mounting Type |
Surface Mount |
Package / Case |
24-TSSOP (0.173, 4.40mm Width) |
Surface Mount |
YES |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Published |
2011 |
Series |
74ABT |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
24 |
Type |
D-Type |
Terminal Finish |
NICKEL PALLADIUM GOLD |
Additional Feature |
POWER OFF DISABLE OUTPUTS TO PERMIT LIVE INSERTION; WITH POWER-UP RESET |
Subcategory |
FF/Latches |
Technology |
BICMOS |
Voltage - Supply |
4.5V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Terminal Pitch |
0.65mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74ABT821 |
JESD-30 Code |
R-PDSO-G24 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
5V |
Supply Voltage-Min (Vsup) |
4.5V |
Load Capacitance |
50pF |
Number of Ports |
2 |
Clock Frequency |
185MHz |
Family |
ABT |
Current - Quiescent (Iq) |
250μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
32mA 64mA |
Output Polarity |
TRUE |
Max I(ol) |
0.064 A |
Number of Bits per Element |
10 |
Max Propagation Delay @ V, Max CL |
6.2ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4pF |
Propagation Delay (tpd) |
6.7 ns |
Power Supply Current-Max (ICC) |
38mA |
Length |
7.8mm |
Width |
4.4mm |
RoHS Status |
ROHS3 Compliant |
74ABT821PW,112 Overview
It is packaged in the way of 24-TSSOP (0.173, 4.40mm Width). D flip flop is embedded in the Tube package. As configured, the output uses Tri-State, Non-Inverted. It is configured with the trigger Positive Edge. There is an electronic component mounted in the way of Surface Mount. With a supply voltage of 4.5V~5.5V volts, it operates. Temperature is set to -40°C~85°C TA. Logic flip flops of this type are classified as D-Type. In this case, it is a type of FPGA belonging to the 74ABT series. There should be no greater frequency than 185MHzon its output. There are 1 elements in it. As a result, it consumes 250μA quiescent current and is not affected by external forces. A total of 24terminations have been recorded. Members of the 74ABT821family make up this object. A voltage of 5V provides power to the D latch. The input capacitance of this T flip flop is 4pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. Electronic devices of this type belong to the ABTfamily. It is included in FF/Latches. Vsup reaches its maximum value at 5.5V. The supply voltage (Vsup) should be kept above 4.5V for normal operation. It operates from 5V power supplies. The flip flop contains 2ports. Additionally, it is characterized by POWER OFF DISABLE OUTPUTS TO PERMIT LIVE INSERTION; WITH POWER-UP RESET.
74ABT821PW,112 Features
Tube package
74ABT series
5V power supplies
74ABT821PW,112 Applications
There are a lot of NXP USA Inc. 74ABT821PW,112 Flip Flops applications.
- Dynamic threshold performance
- Control circuits
- Pattern generators
- Frequency division
- Circuit Design
- Bus hold
- Latch-up performance
- Count Modes
- Supports Live Insertion
- ATE