Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
16-TSSOP (0.173, 4.40mm Width) |
Number of Pins |
16 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74AC |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Type |
JK Type |
Voltage - Supply |
2V~6V |
Base Part Number |
74AC109 |
Function |
Set(Preset) and Reset |
Output Type |
Differential |
Polarity |
Non-Inverting |
Number of Circuits |
2 |
Clock Frequency |
175MHz |
Propagation Delay |
14 ns |
Turn On Delay Time |
6 ns |
Logic Function |
AND, Flip-Flop |
Current - Quiescent (Iq) |
2μA |
Current - Output High, Low |
24mA 24mA |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
10ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4.5pF |
Number of Input Lines |
5 |
Clock Edge Trigger Type |
Positive Edge |
RoHS Status |
RoHS Compliant |
Lead Free |
Lead Free |
74AC109MTCX Overview
It is packaged in the way of 16-TSSOP (0.173, 4.40mm Width). As part of the package Tape & Reel (TR), it is embedded. T flip flop is configured with an output of Differential. It is configured with the trigger Positive Edge. Surface Mountis positioned in the way of this electronic part. With a supply voltage of 2V~6V volts, it operates. A temperature of -40°C~85°C TAis used in the operation. There is JK Type type of electronic flip flop associated with this device. It belongs to the 74ACseries of FPGAs. A frequency of 175MHzshould be the maximum output frequency. There is 2μA quiescent consumption. D latch belongs to the 74AC109 family. Its input capacitance is 4.5pFfarads. It is mounted in the way of Surface Mount. 16pins are included in its design. It has a clock edge trigger type of Positive Edge. Despite its superior flexibility, it relies on 2 circuits to achieve it. It has 5lines.
74AC109MTCX Features
Tape & Reel (TR) package
74AC series
16 pins
74AC109MTCX Applications
There are a lot of ON Semiconductor 74AC109MTCX Flip Flops applications.
- Circuit Design
- Single Up Count-Control Line
- ESD performance
- Data storage
- ESCC
- Modulo – n – counter
- Frequency Dividers
- Clock pulse
- Storage Registers
- Count Modes