Parameters |
Mounting Type |
Surface Mount |
Package / Case |
20-SOIC (0.209, 5.30mm Width) |
Surface Mount |
YES |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Series |
74ACQ |
JESD-609 Code |
e3 |
Pbfree Code |
yes |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
MATTE TIN |
Additional Feature |
BROADSIDE VERSION OF 374 |
Technology |
CMOS |
Voltage - Supply |
2V~6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Reach Compliance Code |
unknown |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
JESD-30 Code |
R-PDSO-G20 |
Function |
Standard |
Qualification Status |
COMMERCIAL |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Supply Voltage-Max (Vsup) |
6V |
Supply Voltage-Min (Vsup) |
2V |
Number of Ports |
2 |
Clock Frequency |
90MHz |
Family |
AC |
Current - Quiescent (Iq) |
40μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
24mA 24mA |
Output Polarity |
TRUE |
Number of Bits per Element |
8 |
Max Propagation Delay @ V, Max CL |
8.5ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4.5pF |
Width |
5.3mm |
RoHS Status |
ROHS3 Compliant |
74ACQ574SJ Overview
In the form of 20-SOIC (0.209, 5.30mm Width), it has been packaged. The package Tubecontains it. In the configuration, Tri-State, Non-Invertedis used as the output. The trigger it is configured with uses Positive Edge. It is mounted in the way of Surface Mount. The JK flip flop operates at 2V~6Vvolts. Temperature is set to -40°C~85°C TA. It belongs to the type D-Typeof flip flops. The 74ACQseries comprises this type of FPGA. This D flip flop should not have a frequency greater than 90MHz. A total of 1elements are contained within it. It consumes 40μA of quiescent Terminations are 20. The input capacitance of this JK flip flopis 4.5pF farads. Devices in the ACfamily are electronic devices. It reaches 6Vwhen the maximum supply voltage (Vsup) is applied. Normally, the supply voltage (Vsup) should be above 2V. This D flip flop is equipped with 0 ports. It is also characterized by BROADSIDE VERSION OF 374.
74ACQ574SJ Features
Tube package
74ACQ series
74ACQ574SJ Applications
There are a lot of Rochester Electronics, LLC 74ACQ574SJ Flip Flops applications.
- Patented noise
- Storage Registers
- Reduced system switching noise
- Test & Measurement
- Instrumentation
- Dynamic threshold performance
- Set-reset capability
- Registers
- Control circuits
- Bus hold