74ACT11074DR
| Parameters | |
|---|---|
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 14 |
| Weight | 129.387224mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74ACT |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74ACT11074 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Operating Supply Voltage | 5V |
| Polarity | Non-Inverting |
| Power Supplies | 5V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Output Current | 24mA |
| Clock Frequency | 125MHz |
| Propagation Delay | 8.5 ns |
| Quiescent Current | 4μA |
| Turn On Delay Time | 5.7 ns |
| Family | ACT |
| Logic Function | AND, D-Type, Flip-Flop |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 8.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3.5pF |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Positive Edge |
| Length | 8.65mm |
| Width | 3.9mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Contains Lead |
74ACT11074DR Overview
It is packaged in the way of 14-SOIC (0.154, 3.90mm Width). It is contained within the Tape & Reel (TR)package. The output it is configured with uses Differential. The trigger it is configured with uses Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. A 4.5V~5.5Vsupply voltage is required for it to operate. It is at -40°C~85°C TAdegrees Celsius that the system is operating. The type of this D latch is D-Type. It is a type of FPGA belonging to the 74ACT series. Its output frequency should not exceed 125MHz. 14terminations have occurred. JK flip flop belongs to 74ACT11074 family. A voltage of 5V provides power to the D latch. The input capacitance of this T flip flop is 3.5pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. The electronic device belongs to the ACTfamily. It is mounted by the way of Surface Mount. The electronic flip flop is designed with pins 14. This device's clock edge trigger type is Positive Edge. It is included in FF/Latches. The superior flexibility is achieved through the use of 2 circuits. Considering the reliability of this T flip flop, it is well suited for TAPE AND REEL. The D latch runs on a voltage of 5V volts. If high efficiency is desired, the supply voltage should be kept at 5V. The 24mA output current allows it to be designed with the greatest amount of flexibility. It operates with 1 output lines. In terms of quiescent current, it consumes 4μA .
74ACT11074DR Features
Tape & Reel (TR) package
74ACT series
14 pins
5V power supplies
74ACT11074DR Applications
There are a lot of Texas Instruments 74ACT11074DR Flip Flops applications.
- Single Up Count-Control Line
- CMOS Process
- Single Down Count-Control Line
- Matched Rise and Fall
- Divide a clock signal by 2 or 4
- Buffered Clock
- Asynchronous counter
- Control circuits
- Storage Registers
- Clock pulse
