Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
24-SOIC (0.209, 5.30mm Width) |
Number of Pins |
24 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74ACT |
Pbfree Code |
yes |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
24 |
Type |
D-Type |
Subcategory |
FF/Latches |
Packing Method |
TAPE AND REEL |
Technology |
CMOS |
Voltage - Supply |
4.5V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
NOT SPECIFIED |
Supply Voltage |
5V |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
74ACT11374 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
5V |
Supply Voltage-Min (Vsup) |
4.5V |
Load Capacitance |
50pF |
Number of Ports |
2 |
Clock Frequency |
70MHz |
Propagation Delay |
11.3 ns |
Turn On Delay Time |
8.5 ns |
Family |
ACT |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
8μA |
Current - Output High, Low |
24mA 24mA |
Number of Bits per Element |
8 |
Max Propagation Delay @ V, Max CL |
11.3ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4pF |
Number of Output Lines |
3 |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
55000000Hz |
Height Seated (Max) |
2mm |
RoHS Status |
Non-RoHS Compliant |
74ACT11374NSR Overview
24-SOIC (0.209, 5.30mm Width)is the way it is packaged. As part of the package Tape & Reel (TR), it is embedded. It is configured with Tri-State, Non-Invertedas an output. It is configured with a trigger that uses Positive Edge. It is mounted in the way of Surface Mount. A voltage of 4.5V~5.5Vis used as the supply voltage. Currently, the operating temperature is -40°C~85°C TA. D-Typedescribes this flip flop. In FPGA terms, D flip flop is a type of 74ACTseries FPGA. You should not exceed 70MHzin its output frequency. The element count is 1 . T flip flop consumes 8μA quiescent energy. Currently, there are 24 terminations. It is a member of the 74ACT11374 family. A voltage of 5V is used to power it. JK flip flop input capacitance is 4pF farads. ACTis the family of this D flip flop. It is mounted by the way of Surface Mount. The 24pins are designed into the board. This device has the clock edge trigger type of Positive Edge. It is included in FF/Latches. The maximal supply voltage (Vsup) reaches 5.5V. The supply voltage (Vsup) should be kept above 4.5V for normal operation. Considering its reliability, this T flip flop is well suited for TAPE AND REEL. The D latch operates on 5V volts. A total of 2ports are embedded in the D flip flop. In order for the chip to function, it has 3output lines.
74ACT11374NSR Features
Tape & Reel (TR) package
74ACT series
24 pins
5V power supplies
74ACT11374NSR Applications
There are a lot of Texas Instruments 74ACT11374NSR Flip Flops applications.
- Consumer
- Divide a clock signal by 2 or 4
- Registers
- Frequency Dividers
- Balanced 24 mA output drivers
- Common Clocks
- Clock pulse
- Single Down Count-Control Line
- Balanced Propagation Delays
- Event Detectors