74ACT18823MTD
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 56-TFSOP (0.240, 6.10mm Width) |
| Supplier Device Package | 56-TSSOP |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74ACT |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Type | D-Type |
| Voltage - Supply | 4.5V~5.5V |
| Base Part Number | 74ACT18823 |
| Function | Master Reset |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 2 |
| Clock Frequency | 100MHz |
| Current - Quiescent (Iq) | 80μA |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 9 |
| Max Propagation Delay @ V, Max CL | 9ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
74ACT18823MTD Overview
56-TFSOP (0.240, 6.10mm Width)is the packaging method. Package Tubeembeds it. T flip flop uses Tri-State, Non-Invertedas the output. This trigger is configured to use Positive Edge. Surface Mountmounts this electrical part. A 4.5V~5.5Vsupply voltage is required for it to operate. It is operating at -40°C~85°C TA. The type of this D latch is D-Type. The 74ACTseries comprises this type of FPGA. A frequency of 100MHzshould not be exceeded by its output. There are 2 elements in it. As a result, it consumes 80μA of quiescent current without being affected by external factors. This D latch belongs to the family of 74ACT18823. The input capacitance of this T flip flop is 4.5pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded.
74ACT18823MTD Features
Tube package
74ACT series
74ACT18823MTD Applications
There are a lot of ON Semiconductor 74ACT18823MTD Flip Flops applications.
- Data Synchronizers
- Shift registers
- Count Modes
- Computers
- Matched Rise and Fall
- Differential Individual
- Automotive
- Control circuits
- Set-reset capability
- Pattern generators
