Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
14-TSSOP (0.173, 4.40mm Width) |
Number of Pins |
14 |
Operating Temperature |
-55°C~125°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74ACT |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
14 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
TAPE AND REEL |
Technology |
CMOS |
Voltage - Supply |
4.5V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
NOT SPECIFIED |
Supply Voltage |
5V |
Terminal Pitch |
0.65mm |
Reach Compliance Code |
unknown |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
74ACT74 |
Function |
Set(Preset) and Reset |
Qualification Status |
Not Qualified |
Output Type |
Differential |
Number of Elements |
2 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
5V |
Supply Voltage-Min (Vsup) |
4.5V |
Load Capacitance |
50pF |
Number of Bits |
1 |
Clock Frequency |
250MHz |
Propagation Delay |
10 ns |
Turn On Delay Time |
5 ns |
Family |
ACT |
Logic Function |
AND, D-Type, Flip-Flop |
Current - Quiescent (Iq) |
4μA |
Current - Output High, Low |
24mA 24mA |
Max Propagation Delay @ V, Max CL |
10ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
3pF |
Number of Input Lines |
1 |
fmax-Min |
85 MHz |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
85000000Hz |
Length |
5mm |
Width |
4.4mm |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
74ACT74TTR Overview
The item is packaged in 14-TSSOP (0.173, 4.40mm Width)cases. It is included in the package Tape & Reel (TR). Differentialis the output configured for it. Positive Edgeis the trigger it is configured with. Surface Mountis positioned in the way of this electronic part. A supply voltage of 4.5V~5.5V is required for operation. Currently, the operating temperature is -55°C~125°C TA. D-Typeis the type of this D latch. JK flip flop is a part of the 74ACTseries of FPGAs. It should not exceed 250MHzin its output frequency. A total of 2 elements are present. T flip flop consumes 4μA quiescent energy. Terminations are 14. The 74ACT74 family contains this object. The D flip flop is powered by a voltage of 5V . Its input capacitance is 3pF farads. A device of this type belongs to the family of ACT. There is an electronic component mounted in the way of Surface Mount. There are 14pins on it. In this device, the clock edge trigger type is Positive Edge. There is a FF/Latchesbase part number assigned to the RS flip flops. The flip flop is designed with 1bits. In this case, the maximum supply voltage (Vsup) reaches 5.5V. Normally, the supply voltage (Vsup) should be kept above 4.5V. Considering the reliability of this T flip flop, it is well suited for TAPE AND REEL. An electrical current of 5V volts is applied to it. Currently, there are 1 lines of input.
74ACT74TTR Features
Tape & Reel (TR) package
74ACT series
14 pins
1 Bits
5V power supplies
74ACT74TTR Applications
There are a lot of STMicroelectronics 74ACT74TTR Flip Flops applications.
- Test & Measurement
- Computing
- Functionally equivalent to the MC10/100EL29
- Memory
- Safety Clamp
- QML qualified product
- CMOS Process
- Control circuits
- Data storage
- Frequency Dividers