74ACT821SCX
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 24-SOIC (0.295, 7.50mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74ACT |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 24 |
| Type | D-Type |
| Terminal Finish | MATTE TIN |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Reach Compliance Code | unknown |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| JESD-30 Code | R-PDSO-G24 |
| Function | Standard |
| Qualification Status | COMMERCIAL |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Number of Ports | 2 |
| Clock Frequency | 150MHz |
| Family | ACT |
| Current - Quiescent (Iq) | 80μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 24mA 24mA |
| Output Polarity | TRUE |
| Number of Bits per Element | 10 |
| Max Propagation Delay @ V, Max CL | 9.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| Height Seated (Max) | 2.65mm |
| Width | 7.5mm |
| RoHS Status | ROHS3 Compliant |
74ACT821SCX Overview
24-SOIC (0.295, 7.50mm Width)is the way it is packaged. It is contained within the Tape & Reel (TR)package. Tri-State, Non-Invertedis the output configured for it. The trigger configured with it uses Positive Edge. Surface Mountmounts this electrical part. The JK flip flop operates with an input voltage of 4.5V~5.5V volts. A temperature of -40°C~85°C TAis used in the operation. A flip flop of this type is classified as a D-Type. In this case, it is a type of FPGA belonging to the 74ACT series. A frequency of 150MHzshould not be exceeded by its output. A total of 1 elements are present. During its operation, it consumes 80μA quiescent energy. There are 24 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. A voltage of 5V is used to power it. Its input capacitance is 4.5pF farads. It belongs to the family of electronic devices known as ACT. Vsup reaches its maximum value at 5.5V. Normally, the supply voltage (Vsup) should be above 4.5V. The D flip flop has no ports embedded.
74ACT821SCX Features
Tape & Reel (TR) package
74ACT series
74ACT821SCX Applications
There are a lot of Rochester Electronics, LLC 74ACT821SCX Flip Flops applications.
- Shift registers
- Frequency Dividers
- Data Synchronizers
- Count Modes
- Functionally equivalent to the MC10/100EL29
- Set-reset capability
- ESCC
- Clock pulse
- Guaranteed simultaneous switching noise level
- Shift Registers
