74ACTQ273PC
| Parameters | |
|---|---|
| Mounting Type | Through Hole |
| Package / Case | 20-DIP (0.300, 7.62mm) |
| Surface Mount | NO |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74ACTQ |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 20 |
| Type | D-Type |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 5V |
| Terminal Pitch | 2.54mm |
| Reach Compliance Code | unknown |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| JESD-30 Code | R-PDIP-T20 |
| Function | Master Reset |
| Qualification Status | Not Qualified |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Clock Frequency | 189MHz |
| Family | ACT |
| Current - Quiescent (Iq) | 40μA |
| Current - Output High, Low | 24mA 24mA |
| Output Polarity | TRUE |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 8.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| Propagation Delay (tpd) | 9 ns |
| Length | 26.075mm |
| Width | 7.62mm |
| RoHS Status | ROHS3 Compliant |
74ACTQ273PC Overview
The package is in the form of 20-DIP (0.300, 7.62mm). A package named Tubeincludes it. The output it is configured with uses Non-Inverted. This trigger uses the value Positive Edge. There is an electronic component mounted in the way of Through Hole. A 4.5V~5.5Vsupply voltage is required for it to operate. -40°C~85°C TAis the operating temperature. It is an electronic flip flop with the type D-Type. The 74ACTQseries comprises this type of FPGA. A frequency of 189MHzshould be the maximum output frequency. A total of 1 elements are present. There is a consumption of 40μAof quiescent energy. There have been 20 terminations. An input voltage of 5Vpowers the D latch. The input capacitance of this T flip flop is 4.5pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. It belongs to the family of electronic devices known as ACT. As soon as 5.5Vis reached, Vsup reaches its maximum value. Normal operation requires a supply voltage (Vsup) above 4.5V.
74ACTQ273PC Features
Tube package
74ACTQ series
74ACTQ273PC Applications
There are a lot of Rochester Electronics, LLC 74ACTQ273PC Flip Flops applications.
- Control circuits
- Bounce elimination switch
- Buffer registers
- Latch-up performance
- Buffered Clock
- Differential Individual
- ESD protection
- Storage Registers
- Shift registers
- Guaranteed simultaneous switching noise level
