74ACTQ273SC
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Number of Pins | 20 |
| Supplier Device Package | 20-SOIC |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74ACTQ |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Type | D-Type |
| Voltage - Supply | 4.5V~5.5V |
| Frequency | 110MHz |
| Base Part Number | 74ACTQ273 |
| Function | Master Reset |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Output Current | 24mA |
| Clock Frequency | 189MHz |
| Current - Quiescent (Iq) | 40μA |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 8.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| Lead Free | Lead Free |
74ACTQ273SC Overview
The flip flop is packaged in 20-SOIC (0.295, 7.50mm Width). As part of the package Tube, it is embedded. T flip flop is configured with an output of Non-Inverted. The trigger it is configured with uses Positive Edge. There is an electric part mounted in the way of Surface Mount. A supply voltage of 4.5V~5.5V is required for operation. The operating temperature is -40°C~85°C TA. This electronic flip flop is of type D-Type. JK flip flop is a part of the 74ACTQseries of FPGAs. Its output frequency should not exceed 189MHz. The element count is 1 . This process consumes 40μA quiescents. If you search by 74ACTQ273, you will find similar parts. A 4.5pFfarad input capacitance is provided by this T flip flop. This board is designed with 20pins on it. It offers maximum design flexibility with its output current of 24mA. The frequency can be set to 110MHz.
74ACTQ273SC Features
Tube package
74ACTQ series
20 pins
74ACTQ273SC Applications
There are a lot of ON Semiconductor 74ACTQ273SC Flip Flops applications.
- Shift Registers
- Individual Asynchronous Resets
- Differential Individual
- Balanced 24 mA output drivers
- Buffer registers
- High Performance Logic for test systems
- Data Synchronizers
- Asynchronous counter
- ESD performance
- Divide a clock signal by 2 or 4
