74ACTQ374SJ
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.209, 5.30mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74ACTQ |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | MATTE TIN |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Reach Compliance Code | unknown |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| JESD-30 Code | R-PDSO-G20 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Number of Ports | 2 |
| Clock Frequency | 85MHz |
| Family | ACT |
| Current - Quiescent (Iq) | 40μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 24mA 24mA |
| Output Polarity | TRUE |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 9ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| Propagation Delay (tpd) | 9.5 ns |
| Width | 5.3mm |
| RoHS Status | ROHS3 Compliant |
74ACTQ374SJ Overview
In the form of 20-SOIC (0.209, 5.30mm Width), it has been packaged. The package Tubecontains it. This output is configured with Tri-State, Non-Inverted. There is a trigger configured with Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. It operates with a supply voltage of 4.5V~5.5V. In the operating environment, the temperature is -40°C~85°C TA. D-Typedescribes this flip flop. This type of FPGA is a part of the 74ACTQ series. You should not exceed 85MHzin its output frequency. In total, it contains 1 elements. As a result, it consumes 40μA quiescent current. There have been 20 terminations. Power is provided by a 5V supply. The input capacitance of this JK flip flopis 4.5pF farads. It belongs to the family of electronic devices known as ACT. As soon as 5.5Vis reached, Vsup reaches its maximum value. For normal operation, the supply voltage (Vsup) should be kept above 4.5V. This D flip flop is equipped with 0 ports.
74ACTQ374SJ Features
Tube package
74ACTQ series
74ACTQ374SJ Applications
There are a lot of Rochester Electronics, LLC 74ACTQ374SJ Flip Flops applications.
- Latch-up performance
- 2 – Bit synchronous counter
- QML qualified product
- Frequency Dividers
- Counters
- Buffered Clock
- Data Synchronizers
- Guaranteed simultaneous switching noise level
- Automotive
- ESD protection
