74ACTQ574PC
| Parameters | |
|---|---|
| Mounting Type | Through Hole |
| Package / Case | 20-DIP (0.300, 7.62mm) |
| Surface Mount | NO |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74ACTQ |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | NOT SPECIFIED |
| Additional Feature | BROADSIDE VERSION OF 374 |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 5V |
| Terminal Pitch | 2.54mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| JESD-30 Code | R-PDIP-T20 |
| Function | Standard |
| Qualification Status | COMMERCIAL |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Number of Ports | 2 |
| Clock Frequency | 85MHz |
| Family | ACT |
| Current - Quiescent (Iq) | 40μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 24mA 24mA |
| Output Polarity | TRUE |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 9ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| Propagation Delay (tpd) | 9.5 ns |
| Length | 26.075mm |
| Width | 7.62mm |
| RoHS Status | ROHS3 Compliant |
74ACTQ574PC Overview
It is embeded in 20-DIP (0.300, 7.62mm) case. A package named Tubeincludes it. Tri-State, Non-Invertedis the output configured for it. In the configuration of the trigger, Positive Edgeis used. Through Holeis occupied by this electronic component. A 4.5V~5.5Vsupply voltage is required for it to operate. In the operating environment, the temperature is -40°C~85°C TA. It belongs to the type D-Typeof flip flops. FPGAs belonging to the 74ACTQseries contain this type of chip. You should not exceed 85MHzin its output frequency. The element count is 1 . It consumes 40μA of quiescent current without being affected by external factors. 20terminations have occurred. An input voltage of 5Vpowers the D latch. The input capacitance of this JK flip flopis 4.5pF farads. In terms of electronic devices, this device belongs to the ACTfamily of devices. Vsup reaches 5.5V, the maximal supply voltage. For normal operation, the supply voltage (Vsup) should be above 4.5V. This D flip flop is equipped with 0 ports. Additionally, you may refer to the D latch's additional BROADSIDE VERSION OF 374.
74ACTQ574PC Features
Tube package
74ACTQ series
74ACTQ574PC Applications
There are a lot of Rochester Electronics, LLC 74ACTQ574PC Flip Flops applications.
- Convert a momentary switch to a toggle switch
- Computers
- Count Modes
- Instrumentation
- Storage Registers
- Frequency division
- Cold spare funcion
- Data transfer
- Patented noise
- Event Detectors
