74AHC273BQ,115
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-VFQFN Exposed Pad |
| Number of Pins | 20 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2008 |
| Series | 74AHC |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Technology | CMOS |
| Voltage - Supply | 2V~5.5V |
| Terminal Position | QUAD |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74AHC273 |
| Function | Master Reset |
| Output Type | Non-Inverted |
| Operating Supply Voltage | 5V |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Bits | 8 |
| Clock Frequency | 110MHz |
| Propagation Delay | 4.2 ns |
| Turn On Delay Time | 6 ns |
| Family | AHC/VHC/H/U/V |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 4μA |
| Current - Output High, Low | 8mA 8mA |
| Max Propagation Delay @ V, Max CL | 11ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| Number of Input Lines | 8 |
| Clock Edge Trigger Type | Positive Edge |
| Length | 4.5mm |
| Width | 2.5mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
74AHC273BQ,115 Overview
20-VFQFN Exposed Padis the way it is packaged. Package Tape & Reel (TR)embeds it. T flip flop uses Non-Invertedas the output. It is configured with the trigger Positive Edge. It is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 2V~5.5V. A temperature of -40°C~125°C TAis considered to be the operating temperature. This D latch has the type D-Type. JK flip flop is a part of the 74AHCseries of FPGAs. It should not exceed 110MHzin its output frequency. A total of 1elements are contained within it. As a result, it consumes 4μA quiescent current and is not affected by external forces. There are 20 terminations,D latch belongs to the 74AHC273 family. Power is provided by a 5V supply. A 3pFfarad input capacitance is provided by this T flip flop. This D flip flop belongs to the family of AHC/VHC/H/U/V. A part of the electronic system is mounted in the way of Surface Mount. It is designed with 20 pins. A Positive Edgeclock edge trigger is used in this device. There are 8bits in this flip flop. The supply voltage (Vsup) should be kept above 2V for normal operation. It is recommended that the supply voltage be kept at 5Vto maximize efficiency. It has 8lines.
74AHC273BQ,115 Features
Tape & Reel (TR) package
74AHC series
20 pins
8 Bits
74AHC273BQ,115 Applications
There are a lot of Nexperia USA Inc. 74AHC273BQ,115 Flip Flops applications.
- Computing
- Count Modes
- ESD performance
- Single Up Count-Control Line
- Registers
- Shift Registers
- Single Down Count-Control Line
- Automotive
- Computers
- CMOS Process
