Parameters |
Factory Lead Time |
1 Week |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-TSSOP (0.173, 4.40mm Width) |
Number of Pins |
20 |
Operating Temperature |
-40°C~125°C TA |
Packaging |
Tube |
Published |
2008 |
Series |
74AHC |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Technology |
CMOS |
Voltage - Supply |
2V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Terminal Pitch |
0.65mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74AHC374 |
Function |
Standard |
Output Type |
Tri-State, Non-Inverted |
Operating Supply Voltage |
5V |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Min (Vsup) |
2V |
Number of Ports |
2 |
Number of Bits |
8 |
Clock Frequency |
120MHz |
Propagation Delay |
4.4 ns |
Turn On Delay Time |
8.4 ns |
Family |
AHC |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
4μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
8mA 8mA |
Max Propagation Delay @ V, Max CL |
10.1ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
3pF |
Number of Input Lines |
8 |
Clock Edge Trigger Type |
Positive Edge |
Length |
6.5mm |
Width |
4.4mm |
Radiation Hardening |
No |
RoHS Status |
RoHS Compliant |
74AHC374PW,112 Overview
The package is in the form of 20-TSSOP (0.173, 4.40mm Width). It is contained within the Tubepackage. This output is configured with Tri-State, Non-Inverted. There is a trigger configured with Positive Edge. The electronic part is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 2V~5.5V. -40°C~125°C TAis the operating temperature. This D latch has the type D-Type. In this case, it is a type of FPGA belonging to the 74AHC series. It should not exceed 120MHzin its output frequency. In total, there are 1 elements. There is a consumption of 4μAof quiescent energy. A total of 20terminations have been recorded. The 74AHC374family includes it. The power source is powered by 5V. This JK flip flop has a 3pFfarad input capacitance. In terms of electronic devices, this device belongs to the AHCfamily of devices. There is an electronic component mounted in the way of Surface Mount. As you can see from the design, it has pins with 20. Its clock edge trigger type is Positive Edge. An electronic part with 8bits has been designed. The supply voltage (Vsup) should be maintained above 2V for normal operation. The D flip flop is embedded with 2ports. If high efficiency is to be achieved, the supply voltage should be maintained at 5V. As of now, there are 8input lines.
74AHC374PW,112 Features
Tube package
74AHC series
20 pins
8 Bits
74AHC374PW,112 Applications
There are a lot of Nexperia USA Inc. 74AHC374PW,112 Flip Flops applications.
- Pattern generators
- Communications
- Storage registers
- Circuit Design
- Set-reset capability
- Count Modes
- Dynamic threshold performance
- Frequency division
- Functionally equivalent to the MC10/100EL29
- CMOS Process