74AHC74BQ,115
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-VFQFN Exposed Pad |
| Number of Pins | 14 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2013 |
| Series | 74AHC |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Technology | CMOS |
| Voltage - Supply | 2V~5.5V |
| Terminal Position | QUAD |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Base Part Number | 74AHC74 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Operating Supply Voltage | 5V |
| Polarity | Non-Inverting |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 2 |
| Clock Frequency | 115MHz |
| Propagation Delay | 20 ns |
| Turn On Delay Time | 7.4 ns |
| Family | AHC/VHC/H/U/V |
| Logic Function | AND, D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 2μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 8mA 8mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 9.3ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Positive Edge |
| Length | 3mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
74AHC74BQ,115 Overview
The package is in the form of 14-VFQFN Exposed Pad. The Tape & Reel (TR)package contains it. T flip flop uses Differentialas the output. There is a trigger configured with Positive Edge. Surface Mountis occupied by this electronic component. A supply voltage of 2V~5.5V is required for operation. The operating temperature is -40°C~125°C TA. This D latch has the type D-Type. FPGAs belonging to the 74AHCseries contain this type of chip. In order for it to function properly, its output frequency should not exceed 115MHz. There is 2μA quiescent consumption. 14terminations have occurred. The 74AHC74family includes it. An input voltage of 5Vpowers the D latch. JK flip flop input capacitance is 3pF farads. A device of this type belongs to the family of AHC/VHC/H/U/V. Surface Mount mounts this electronic component. As you can see from the design, it has pins with 14. There is a clock edge trigger type of Positive Edgeon this device. If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 2V. Despite its superior flexibility, it relies on 2 circuits to achieve it. For high efficiency, the supply voltage should be set to 5V. There are no output lines on the JK flip flop.
74AHC74BQ,115 Features
Tape & Reel (TR) package
74AHC series
14 pins
74AHC74BQ,115 Applications
There are a lot of Nexperia USA Inc. 74AHC74BQ,115 Flip Flops applications.
- Storage Registers
- Memory
- Matched Rise and Fall
- Test & Measurement
- Supports Live Insertion
- Clock pulse
- EMI reduction circuitry
- Latch-up performance
- Modulo – n – counter
- Storage registers
