74AHCT273BQ,115
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-VFQFN Exposed Pad |
| Number of Pins | 20 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2008 |
| Series | 74AHCT |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | QUAD |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74AHCT273 |
| Function | Master Reset |
| Output Type | Non-Inverted |
| Operating Supply Voltage | 5V |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Number of Bits | 8 |
| Clock Frequency | 75MHz |
| Propagation Delay | 4 ns |
| Turn On Delay Time | 5.8 ns |
| Family | AHCT/VHCT/VT |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 4μA |
| Current - Output High, Low | 8mA 8mA |
| Max Propagation Delay @ V, Max CL | 9.2ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| Number of Input Lines | 8 |
| fmax-Min | 65 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Length | 4.5mm |
| Width | 2.5mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
74AHCT273BQ,115 Overview
The package is in the form of 20-VFQFN Exposed Pad. It is included in the package Tape & Reel (TR). As configured, the output uses Non-Inverted. There is a trigger configured with Positive Edge. Surface Mountmounts this electrical part. The JK flip flop operates with an input voltage of 4.5V~5.5V volts. In the operating environment, the temperature is -40°C~125°C TA. D-Typeis the type of this D latch. In terms of FPGAs, it belongs to the 74AHCT series. A frequency of 75MHzshould not be exceeded by its output. D latch consists of 1 elements. There is a consumption of 4μAof quiescent energy. There have been 20 terminations. The object belongs to the 74AHCT273 family. The power source is powered by 5V. JK flip flop input capacitance is 3pF farads. This D flip flop belongs to the family of AHCT/VHCT/VT. A part of the electronic system is mounted in the way of Surface Mount. 20pins are included in its design. There is a clock edge trigger type of Positive Edgeon this device. 8bits are used in its design. For high efficiency, the supply voltage should be kept at 5V. This input has 8lines.
74AHCT273BQ,115 Features
Tape & Reel (TR) package
74AHCT series
20 pins
8 Bits
74AHCT273BQ,115 Applications
There are a lot of Nexperia USA Inc. 74AHCT273BQ,115 Flip Flops applications.
- Computing
- CMOS Process
- Memory
- Bus hold
- ESCC
- Data Synchronizers
- Individual Asynchronous Resets
- Single Up Count-Control Line
- Asynchronous counter
- Supports Live Insertion
