74AHCT273D,118
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Number of Pins | 20 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 1998 |
| Series | 74AHCT |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74AHCT273 |
| Function | Master Reset |
| Output Type | Non-Inverted |
| Operating Supply Voltage | 5V |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Output Current | 25mA |
| Number of Bits | 8 |
| Clock Frequency | 75MHz |
| Propagation Delay | 4 ns |
| Turn On Delay Time | 5.8 ns |
| Family | AHCT/VHCT |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 4μA |
| Current - Output High, Low | 8mA 8mA |
| Max Propagation Delay @ V, Max CL | 9.2ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| Number of Input Lines | 8 |
| fmax-Min | 65 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Height Seated (Max) | 2.65mm |
| Width | 7.5mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
74AHCT273D,118 Overview
The flip flop is packaged in a case of 20-SOIC (0.295, 7.50mm Width). D flip flop is included in the Tape & Reel (TR)package. T flip flop uses Non-Invertedas the output. There is a trigger configured with Positive Edge. There is an electronic component mounted in the way of Surface Mount. With a supply voltage of 4.5V~5.5V volts, it operates. In this case, the operating temperature is -40°C~125°C TA. D-Typeis the type of this D latch. In FPGA terms, D flip flop is a type of 74AHCTseries FPGA. It should not exceed 75MHzin terms of its output frequency. A total of 1 elements are present. As a result, it consumes 4μA quiescent current. It has been determined that there have been 20 terminations. JK flip flop belongs to 74AHCT273 family. A voltage of 5V is used as the power supply for this D latch. There is 3pF input capacitance for this T flip flop. It belongs to the family of electronic devices known as AHCT/VHCT. The electronic part is mounted in the way of Surface Mount. The electronic flip flop is designed with pins 20. A Positive Edgeclock edge trigger is used in this device. It is designed with a number of bits of 8. Optimal efficiency requires a supply voltage of 5V. The 25mA output current allows it to be designed with the greatest amount of flexibility. 8input lines are available for you to choose from.
74AHCT273D,118 Features
Tape & Reel (TR) package
74AHCT series
20 pins
8 Bits
74AHCT273D,118 Applications
There are a lot of Nexperia USA Inc. 74AHCT273D,118 Flip Flops applications.
- Control circuits
- Latch
- Buffer registers
- Shift Registers
- Power down protection
- Balanced 24 mA output drivers
- Guaranteed simultaneous switching noise level
- Counters
- Single Up Count-Control Line
- Data transfer
