74ALVC574PW,112
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 20 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74ALVC |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.7V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74ALVC574 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Number of Ports | 2 |
| Number of Bits | 8 |
| Clock Frequency | 300MHz |
| Propagation Delay | 2.5 ns |
| Turn On Delay Time | 3.1 ns |
| Family | ALVC/VCX/A |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 10μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 24mA 24mA |
| Max Propagation Delay @ V, Max CL | 3.6ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3.5pF |
| Number of Input Lines | 8 |
| Clock Edge Trigger Type | Positive Edge |
| Length | 6.5mm |
| Width | 4.4mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
74ALVC574PW,112 Overview
As a result, it is packaged as 20-TSSOP (0.173, 4.40mm Width). There is an embedded version in the package Tube. This output is configured with Tri-State, Non-Inverted. It is configured with a trigger that uses a value of Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. A voltage of 1.65V~3.6Vis used as the supply voltage. A temperature of -40°C~85°C TAis used in the operation. It is an electronic flip flop with the type D-Type. JK flip flop belongs to the 74ALVCseries of FPGAs. Its output frequency should not exceed 300MHz. The element count is 1 . It consumes 10μA of quiescent Currently, there are 20 terminations. The object belongs to the 74ALVC574 family. The power source is powered by 2.7V. There is 3.5pF input capacitance for this T flip flop. It belongs to the family of electronic devices known as ALVC/VCX/A. The electronic part is mounted in the way of Surface Mount. This board is designed with 20pins on it. There is a clock edge trigger type of Positive Edgeon this device. The design is based on 8bits. Vsup reaches 3.6V, the maximal supply voltage. The flip flop has 2embedded ports. It has 8lines.
74ALVC574PW,112 Features
Tube package
74ALVC series
20 pins
8 Bits
74ALVC574PW,112 Applications
There are a lot of Nexperia USA Inc. 74ALVC574PW,112 Flip Flops applications.
- Instrumentation
- Single Up Count-Control Line
- Counters
- Frequency Divider circuits
- Supports Live Insertion
- Control circuits
- Communications
- Shift registers
- Frequency Dividers
- Safety Clamp
