74ALVC74D,112
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 14 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74ALVC |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| Type | D-Type |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74ALVC74 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Number of Circuits | 2 |
| Clock Frequency | 425MHz |
| Propagation Delay | 2.3 ns |
| Quiescent Current | 200nA |
| Turn On Delay Time | 3.7 ns |
| Family | ALVC/VCX/A |
| Logic Function | AND, D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 3.8ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3.5pF |
| Number of Output Lines | 1 |
| fmax-Min | 300 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Length | 8.65mm |
| Width | 3.9mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
74ALVC74D,112 Overview
In the form of 14-SOIC (0.154, 3.90mm Width), it has been packaged. The package Tubecontains it. T flip flop uses Differentialas its output configuration. There is a trigger configured with Positive Edge. It is mounted in the way of Surface Mount. A supply voltage of 1.65V~3.6V is required for operation. -40°C~85°C TAis the operating temperature. This D latch has the type D-Type. FPGAs belonging to the 74ALVCseries contain this type of chip. You should not exceed 425MHzin its output frequency. As a result, it consumes 10μA quiescent current. Currently, there are 14 terminations. The 74ALVC74 family contains this object. It is powered by a voltage of 1.8V . The input capacitance of this JK flip flopis 3.5pF farads. ALVC/VCX/Ais the family of this D flip flop. This electronic part is mounted in the way of Surface Mount. There are 14pins on it. This device's clock edge trigger type is Positive Edge. Vsup reaches 3.6V, the maximal supply voltage. To achieve this superior flexibility, 2 circuits are used. To operate, the chip has a total of 1 output lines. As a result, it consumes 200nA of quiescent current without being affected by external factors.
74ALVC74D,112 Features
Tube package
74ALVC series
14 pins
74ALVC74D,112 Applications
There are a lot of Nexperia USA Inc. 74ALVC74D,112 Flip Flops applications.
- Counters
- ESD protection
- Dynamic threshold performance
- Memory
- Parallel data storage
- Buffer registers
- Modulo – n – counter
- Instrumentation
- Communications
- Automotive
