74ALVC74D,118
| Parameters | |
|---|---|
| Base Part Number | 74ALVC74 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Number of Circuits | 2 |
| Clock Frequency | 425MHz |
| Propagation Delay | 2.3 ns |
| Quiescent Current | 200nA |
| Turn On Delay Time | 3.7 ns |
| Family | ALVC/VCX/A |
| Logic Function | AND, D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 3.8ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3.5pF |
| Number of Output Lines | 1 |
| fmax-Min | 300 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Length | 8.65mm |
| Width | 3.9mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Factory Lead Time | 1 Week |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 14 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74ALVC |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| Type | D-Type |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Time@Peak Reflow Temperature-Max (s) | 30 |
74ALVC74D,118 Overview
The item is packaged in 14-SOIC (0.154, 3.90mm Width)cases. It is included in the package Tape & Reel (TR). The output it is configured with uses Differential. JK flip flop uses Positive Edgeas the trigger. Surface Mountis positioned in the way of this electronic part. A 1.65V~3.6Vsupply voltage is required for it to operate. -40°C~85°C TAis the operating temperature. It is an electronic flip flop with the type D-Type. JK flip flop is a part of the 74ALVCseries of FPGAs. A frequency of 425MHzshould not be exceeded by its output. During its operation, it consumes 10μA quiescent energy. It has been determined that there have been 14 terminations. The 74ALVC74 family contains it. An input voltage of 1.8Vpowers the D latch. A 3.5pFfarad input capacitance is provided by this T flip flop. It is a member of the ALVC/VCX/Afamily of D flip flop. There is an electronic part mounted in the way of Surface Mount. A total of 14pins are provided on this board. It has a clock edge trigger type of Positive Edge. As soon as Vsup reaches 3.6V, the maximum supply voltage is reached. Due to its superior flexibility, it uses 2 circuits. There are 1 output lines on it. It consumes 200nA of quiescent current without being affected by external factors.
74ALVC74D,118 Features
Tape & Reel (TR) package
74ALVC series
14 pins
74ALVC74D,118 Applications
There are a lot of Nexperia USA Inc. 74ALVC74D,118 Flip Flops applications.
- Buffer registers
- Single Down Count-Control Line
- Safety Clamp
- Computing
- Clock pulse
- Bus hold
- Data storage
- Memory
- ESD performance
- Latch
