74ALVT162823DL,512
| Parameters | |
|---|---|
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 56-BSSOP (0.295, 7.50mm Width) |
| Number of Pins | 56 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74ALVT |
| JESD-609 Code | e4 |
| Part Status | Not For New Designs |
| Moisture Sensitivity Level (MSL) | 2 (1 Year) |
| Number of Terminations | 56 |
| Type | D-Type |
| Additional Feature | WITH CLEAR AND CLOCK ENABLE; CAN ALSO BE OPERATED AT 3.3+/-0.3V |
| Technology | BICMOS |
| Voltage - Supply | 2.3V~2.7V 3V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.5V |
| Terminal Pitch | 0.635mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74ALVT162823 |
| Function | Master Reset |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 2 |
| Polarity | Non-Inverting |
| Number of Ports | 2 |
| Number of Bits | 18 |
| Propagation Delay | 3 ns |
| Quiescent Current | 3.9mA |
| Turn On Delay Time | 3.7 ns |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 70μA |
| Output Characteristics | 3-STATE WITH SERIES RESISTOR |
| Current - Output High, Low | 8mA 12mA; 12mA 12mA |
| Max Propagation Delay @ V, Max CL | 4.4ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| Number of Output Lines | 9 |
| Clock Edge Trigger Type | Positive Edge |
| Width | 7.5mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
74ALVT162823DL,512 Overview
The item is packaged in 56-BSSOP (0.295, 7.50mm Width)cases. As part of the package Tube, it is embedded. T flip flop is configured with an output of Tri-State, Non-Inverted. The trigger it is configured with uses Positive Edge. Surface Mountmounts this electrical part. The supply voltage is set to 2.3V~2.7V 3V~3.6V. It is at -40°C~85°C TAdegrees Celsius that the system is operating. It belongs to the type D-Typeof flip flops. In this case, it is a type of FPGA belonging to the 74ALVT series. A total of 2elements are contained within it. There is 70μA quiescent consumption. Terminations are 56. The 74ALVT162823family includes it. The power source is powered by 2.5V. JK flip flop input capacitance is 3pF farads. Electronic part Surface Mountis mounted in the way. The 56pins are designed into the board. This device's clock edge trigger type is Positive Edge. Flip flops designed with 18bits are used in this part. The D flip flop has no ports embedded. The JK flip flop is with 9 output lines to operate. It consumes a total of 3.9mA quiescent current at any given time. Additionally, it is characterized by WITH CLEAR AND CLOCK ENABLE; CAN ALSO BE OPERATED AT 3.3+/-0.3V.
74ALVT162823DL,512 Features
Tube package
74ALVT series
56 pins
18 Bits
74ALVT162823DL,512 Applications
There are a lot of Nexperia USA Inc. 74ALVT162823DL,512 Flip Flops applications.
- Automotive
- Registers
- Shift Registers
- Frequency Divider circuits
- Frequency Dividers
- Computers
- Latch
- Count Modes
- Computing
- Modulo – n – counter
