Parameters |
Mounting Type |
Surface Mount |
Package / Case |
48-BSSOP (0.295, 7.50mm Width) |
Surface Mount |
YES |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Series |
74ALVT |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
48 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Additional Feature |
CAN ALSO OPERATE AT 3.3V SUPPLY |
Subcategory |
FF/Latches |
Technology |
BICMOS |
Voltage - Supply |
2.3V~2.7V 3V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
2.5V |
Terminal Pitch |
0.635mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74ALVT16374 |
JESD-30 Code |
R-PDSO-G48 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
2 |
Power Supplies |
3.3V |
Load Capacitance |
50pF |
Number of Ports |
2 |
Number of Bits |
8 |
Clock Frequency |
250MHz |
Current - Quiescent (Iq) |
100μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
8mA 24mA; 32mA 64mA |
Output Polarity |
TRUE |
Max I(ol) |
0.064 A |
Max Propagation Delay @ V, Max CL |
3.2ns @ 3.3V, 50pF |
Prop. Delay@Nom-Sup |
5.4 ns |
Trigger Type |
Positive Edge |
Input Capacitance |
3pF |
Propagation Delay (tpd) |
4.5 ns |
Power Supply Current-Max (ICC) |
4.5mA |
Length |
15.875mm |
Width |
7.5mm |
RoHS Status |
ROHS3 Compliant |
74ALVT16374DL,112 Overview
In the form of 48-BSSOP (0.295, 7.50mm Width), it has been packaged. D flip flop is embedded in the Tube package. The output it is configured with uses Tri-State, Non-Inverted. The trigger it is configured with uses Positive Edge. This electronic part is mounted in the way of Surface Mount. The JK flip flop operates at 2.3V~2.7V 3V~3.6Vvolts. -40°C~85°C TAis the operating temperature. This electronic flip flop is of type D-Type. It is a type of FPGA belonging to the 74ALVT series. Its output frequency should not exceed 250MHz. The list contains 2 elements. It consumes 100μA of quiescent It has been determined that there have been 48 terminations. JK flip flop belongs to 74ALVT16374 family. An input voltage of 2.5Vpowers the D latch. There is 3pF input capacitance for this T flip flop. It is part of the FF/Latchesbase part number family. This flip flop is designed with 8 Bits. It runs on 3.3Vvolts of power. The flip flop has 2embedded ports. Additionally, there are CAN ALSO OPERATE AT 3.3V SUPPLY on the electronic flip flop that can be referred to.
74ALVT16374DL,112 Features
Tube package
74ALVT series
8 Bits
3.3V power supplies
74ALVT16374DL,112 Applications
There are a lot of NXP USA Inc. 74ALVT16374DL,112 Flip Flops applications.
- Count Modes
- Divide a clock signal by 2 or 4
- Power down protection
- Clock pulse
- Frequency Dividers
- Memory
- Data storage
- EMI reduction circuitry
- ESD performance
- Modulo – n – counter