74ALVT16823DGGY
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 56-TFSOP (0.240, 6.10mm Width) |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74ALVT |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 2 (1 Year) |
| Number of Terminations | 56 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Additional Feature | ALSO OPERATES FROM 3V TO 3.6V SUPPLY |
| Technology | BICMOS |
| Voltage - Supply | 2.3V~2.7V 3V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Supply Voltage | 2.5V |
| Terminal Pitch | 0.5mm |
| JESD-30 Code | R-PDSO-G56 |
| Function | Master Reset |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 2 |
| Number of Ports | 2 |
| Clock Frequency | 250MHz |
| Propagation Delay | 3.1 ns |
| Quiescent Current | 100μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 8mA 24mA; 32mA 64mA |
| Output Polarity | TRUE |
| Number of Bits per Element | 9 |
| Max Propagation Delay @ V, Max CL | 3.1ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| Clock Edge Trigger Type | Positive Edge |
| Length | 14mm |
| Width | 6.1mm |
| RoHS Status | ROHS3 Compliant |
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
74ALVT16823DGGY Overview
56-TFSOP (0.240, 6.10mm Width)is the way it is packaged. D flip flop is embedded in the Tape & Reel (TR) package. This output is configured with Tri-State, Non-Inverted. JK flip flop uses Positive Edgeas the trigger. There is an electronic component mounted in the way of Surface Mount. A supply voltage of 2.3V~2.7V 3V~3.6V is required for operation. -40°C~85°C TAis the operating temperature. It belongs to the type D-Typeof flip flops. It is a type of FPGA belonging to the 74ALVT series. It should not exceed 250MHzin its output frequency. In total, there are 2 elements. Terminations are 56. A voltage of 2.5V is used as the power supply for this D latch. Input capacitance of this device is 3pF farads. It is mounted by the way of Surface Mount. A Positive Edgeclock edge trigger is used in this device. This flip flop has a total of 2ports. It consumes 100μA of quiescent current without being affected by external factors. There is also a characteristic of ALSO OPERATES FROM 3V TO 3.6V SUPPLY.
74ALVT16823DGGY Features
Tape & Reel (TR) package
74ALVT series
74ALVT16823DGGY Applications
There are a lot of Nexperia USA Inc. 74ALVT16823DGGY Flip Flops applications.
- CMOS Process
- Pattern generators
- Data transfer
- Balanced Propagation Delays
- 2 – Bit synchronous counter
- Shift Registers
- Single Up Count-Control Line
- Bus hold
- Synchronous counter
- Parallel data storage
