74AUP1G373GM,132
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Contact Plating | Tin |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 6-XFDFN |
| Number of Pins | 6 |
| Operating Temperature | -40°C~125°C |
| Packaging | Tape & Reel (TR) |
| Series | 74AUP |
| JESD-609 Code | e3 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 6 |
| Technology | CMOS |
| Voltage - Supply | 0.8V~3.6V |
| Terminal Position | DUAL |
| Peak Reflow Temperature (Cel) | 260 |
| Number of Functions | 1 |
| Supply Voltage | 1.2V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74AUP1G373 |
| Pin Count | 6 |
| Output Type | Tri-State |
| Circuit | 1:1 |
| Polarity | Non-Inverting |
| Supply Voltage-Min (Vsup) | 0.8V |
| Number of Circuits | 1 |
| Number of Bits | 1 |
| Propagation Delay | 12.3 ns |
| Quiescent Current | 500nA |
| Turn On Delay Time | 2.5 ns |
| Family | AUP/ULP/V |
| Logic Function | D-Type, Latch |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 4mA 4mA |
| Logic Type | D-Type Transparent Latch |
| Trigger Type | POSITIVE EDGE |
| Height Seated (Max) | 0.5mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
74AUP1G373GM,132 Overview
There is an embedded version of it in package 6-XFDFN. A Tape & Reel (TR) package is used to package it. Tri-State is used for the output it is configured with. This electrical device has the logic type D-Type Transparent Latch. Based on the way of Surface Mount, this electronic part is mounted. In order for it to operate, it needs a supply voltage of 0.8V~3.6V. There is -40°C~125°C operating temperature. In the 74AUP series, this FPGA is located. The design of this electronic part contains 1 bits. In this device, there are 6 terminations that have been designed. The family 74AUP1G373 includes it. In order to function, the supply voltage should be set to 1.2V. 6 pins are included. There is a device in this electronic family called AUP/ULP/V. 6 pins are used in its design. The electronic part is mounted using the Surface Mount method. The supply voltage (Vsup) should be greater than 0.8V. It consumes 500nA current from its quiescent state without being affected by external factors at all. 1 circuits are used to achieve superior flexibility.
74AUP1G373GM,132 Features
6-XFDFN package
74AUP series
1 Bits
74AUP1G373 family
6 pin count
6 pins
74AUP1G373GM,132 Applications
There are a lot of Nexperia USA Inc. 74AUP1G373GM,132 Latches applications.
- Automotive ADAS
- Buffer register
- Counter control
- Pattern generators
- Multistage ripple counting
- Network Switches
- Control circuits
- Counter
- Counting
- BCD counting
