74AUP1G373GN,132
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Contact Plating | Tin |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 6-XFDFN |
| Number of Pins | 6 |
| Operating Temperature | -40°C~125°C |
| Packaging | Tape & Reel (TR) |
| Series | 74AUP |
| JESD-609 Code | e3 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 6 |
| Technology | CMOS |
| Voltage - Supply | 0.8V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | NO LEAD |
| Peak Reflow Temperature (Cel) | 260 |
| Number of Functions | 1 |
| Supply Voltage | 1.1V |
| Terminal Pitch | 0.3mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74AUP1G373 |
| Pin Count | 6 |
| Output Type | Tri-State |
| Number of Elements | 1 |
| Circuit | 1:1 |
| Polarity | Non-Inverting |
| Supply Voltage-Min (Vsup) | 0.8V |
| Nominal Supply Current | 50mA |
| Number of Bits | 1 |
| Propagation Delay | 15.2 ns |
| Quiescent Current | 500nA |
| Turn On Delay Time | 2.5 ns |
| Family | AUP/ULP/V |
| Logic Function | D-Type, Latch |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 4mA 4mA |
| Logic Type | D-Type Transparent Latch |
| Trigger Type | HIGH LEVEL |
| Height Seated (Max) | 0.35mm |
| Width | 0.9mm |
| RoHS Status | ROHS3 Compliant |
74AUP1G373GN,132 Overview
There is an embedded version of it in package 6-XFDFN. As a result, it has a packaging of Tape & Reel (TR). It uses Tri-State as its output configuration. There is a logic type of D-Type Transparent Latch for this electrical device. Electronic parts are mounted in accordance with Surface Mount. It operates at a voltage of 0.8V~3.6V. It is -40°C~125°C at the operating temperature. The 74AUP series is associated with this FPGA. The design of this electronic part is based on 1 bits. A device with this design has 6 terminations. There is no doubt that it belongs to the family 74AUP1G373. The supply voltage of the device is 1.1V. It has 6 pins that makes it easy to use. AUP/ULP/V is the family name of this electronic device. 6 pins are used in its design. It is mounted according to the Surface Mount method. The supply voltage (Vsup) should be greater than 0.8V. The quiescent current consumed by it is 500nA because it is unaffected by external factors. A total of 1 elements make up this object.
74AUP1G373GN,132 Features
6-XFDFN package
74AUP series
1 Bits
74AUP1G373 family
6 pin count
6 pins
1 elements
74AUP1G373GN,132 Applications
There are a lot of Nexperia USA Inc. 74AUP1G373GN,132 Latches applications.
- Data acquisition
- Parallel data storage
- Four-bit storage with output enable
- Instrumentation
- Parallel data storage
- Network Switches
- Automotive ADAS
- Automotive Cluster
- Shift left register
- Counting
