74AUP1G374GM,115
| Parameters | |
|---|---|
| Family | AUP/ULP/V |
| Current - Quiescent (Iq) | 500nA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 4mA 4mA |
| Max Propagation Delay @ V, Max CL | 5.8ns @ 3.3V, 30pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 0.8pF |
| Clock Edge Trigger Type | Positive Edge |
| Height Seated (Max) | 0.5mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 6-XFDFN |
| Number of Pins | 6 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74AUP |
| JESD-609 Code | e3 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 6 |
| Type | D-Type |
| Terminal Finish | Tin (Sn) |
| Technology | CMOS |
| Voltage - Supply | 0.8V~3.6V |
| Terminal Position | DUAL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.2V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74AUP1G374 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Polarity | Non-Inverting |
| Supply Voltage-Min (Vsup) | 0.8V |
| Number of Circuits | 1 |
| Number of Bits | 1 |
| Clock Frequency | 309MHz |
| Propagation Delay | 20.5 ns |
| Turn On Delay Time | 23.6 ns |
74AUP1G374GM,115 Overview
The flip flop is packaged in 6-XFDFN. There is an embedded version in the package Tape & Reel (TR). As configured, the output uses Tri-State, Non-Inverted. It is configured with a trigger that uses a value of Positive Edge. The electronic part is mounted in the way of Surface Mount. A supply voltage of 0.8V~3.6V is required for operation. In the operating environment, the temperature is -40°C~125°C TA. Logic flip flops of this type are classified as D-Type. In this case, it is a type of FPGA belonging to the 74AUP series. A frequency of 309MHzshould not be exceeded by its output. It consumes 500nA of quiescent A total of 6 terminations have been made. It is a member of the 74AUP1G374 family. The power supply voltage is 1.2V. The input capacitance of this T flip flop is 0.8pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. An electronic device belonging to the family AUP/ULP/Vcan be found here. Surface Mount mounts this electronic component. It is designed with 6 pins. Its clock edge trigger type is Positive Edge. There are 1bits in this flip flop. The supply voltage (Vsup) should be kept above 0.8V for normal operation. 1 circuits are used to achieve its superior flexibility.
74AUP1G374GM,115 Features
Tape & Reel (TR) package
74AUP series
6 pins
1 Bits
74AUP1G374GM,115 Applications
There are a lot of Nexperia USA Inc. 74AUP1G374GM,115 Flip Flops applications.
- Supports Live Insertion
- Registers
- Automotive
- Control circuits
- Load Control
- Asynchronous counter
- Frequency division
- Digital electronics systems
- Buffer registers
- Count Modes
