74AUP1G74GXX
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mounting Type | Surface Mount |
| Package / Case | 8-XFDFN Exposed Pad |
| Surface Mount | YES |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74AUP |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| Type | D-Type |
| Technology | CMOS |
| Voltage - Supply | 0.8V~3.6V |
| Terminal Position | BOTTOM |
| Terminal Form | BUTT |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 1.1V |
| Reach Compliance Code | compliant |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| JESD-30 Code | R-PBCC-B8 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 3.6V |
| Supply Voltage-Min (Vsup) | 0.8V |
| Number of Bits | 1 |
| Clock Frequency | 315MHz |
| Family | AUP/ULP/V |
| Current - Quiescent (Iq) | 500nA |
| Current - Output High, Low | 4mA 4mA |
| Output Polarity | COMPLEMENTARY |
| Max Propagation Delay @ V, Max CL | 5.8ns @ 3.3V, 30pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 0.6pF |
| Propagation Delay (tpd) | 23.3 ns |
| Height Seated (Max) | 0.35mm |
| Width | 0.8mm |
74AUP1G74GXX Overview
8-XFDFN Exposed Padis the way it is packaged. Package Tape & Reel (TR)embeds it. It is configured with Differentialas an output. It is configured with a trigger that uses a value of Positive Edge. Surface Mountis positioned in the way of this electronic part. The JK flip flop operates at 0.8V~3.6Vvolts. It is at -40°C~125°C TAdegrees Celsius that the system is operating. D-Typedescribes this flip flop. This type of FPGA is a part of the 74AUP series. Its output frequency should not exceed 315MHz. A total of 1 elements are present. T flip flop consumes 500nA quiescent energy. There are 8 terminations,It is powered by a voltage of 1.1V . The input capacitance of this T flip flop is 0.6pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. A device of this type belongs to the family of AUP/ULP/V. The design is based on 1bits. Vsup reaches 3.6V, the maximal supply voltage. A normal operating voltage (Vsup) should remain above 0.8V.
74AUP1G74GXX Features
Tape & Reel (TR) package
74AUP series
1 Bits
74AUP1G74GXX Applications
There are a lot of Nexperia USA Inc. 74AUP1G74GXX Flip Flops applications.
- Common Clocks
- Set-reset capability
- 2 – Bit synchronous counter
- Bus hold
- Single Up Count-Control Line
- Storage registers
- ESD protection
- Frequency division
- Computing
- Counters
