74AUP2G240GD,125
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-XFDFN |
| Number of Pins | 8 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2010 |
| Series | 74AUP |
| JESD-609 Code | e3 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| Terminal Finish | Matte Tin (Sn) |
| Subcategory | Bus Driver/Transceivers |
| Packing Method | TAPE AND REEL |
| Technology | CMOS |
| Voltage - Supply | 0.8V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | NO LEAD |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Number of Functions | 2 |
| Supply Voltage | 1.1V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74AUP2G240 |
| Pin Count | 8 |
| Qualification Status | Not Qualified |
| Output Type | 3-State |
| Polarity | Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Number of Circuits | 2 |
| Load Capacitance | 30pF |
| Number of Ports | 2 |
| Propagation Delay | 6.4 ns |
| Quiescent Current | 500nA |
| Turn On Delay Time | 29.5 ns |
| Family | AUP/ULP/V |
| Logic Function | Buffer, Inverter |
| Current - Output High, Low | 4mA 4mA |
| Logic Type | Buffer, Inverting |
| Number of Bits per Element | 1 |
| Control Type | ENABLE LOW |
| Height Seated (Max) | 0.5mm |
| Length | 3mm |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
74AUP2G240GD,125 Overview
Logical driver uses a neat 8-XFDFN package. Tape & Reel (TR) external packaging. Available in Surface Mount. Voltage buffer adopts Buffer, Inverting logic prototype. Buffer IC is fed with a voltage of 0.8V~3.6V. Qualified to operate within -40°C~125°C TA. The high and low logic state output current of logical driver is 4mA 4mA. Logical driver can deal with 3-State output (s). Digital buffer is one of the 74AUP series devices. 8 terminations with different functions. Buffer IC reuqires a supply voltage of 1.1V. Family AUP/ULP/V includes the buffer IC . 8 pins are set with the electric part. Buffer IC is suitable for Surface Mount applications. Logical driver has 8 pins. Enhanced with 2 ports. The bus transceiver employs 1 bits for each element. You can search "74AUP2G240" for other related electrical components. Specifically, digital transciever is a kind of Bus Driver/Transceivers. The digital buffer starts up under ENABLE LOW control technology. In quiescent state, the electronic part uses 500nA. It is generally sold in TAPE AND REEL package. The fundamental operation of logical driver is based on 2 circuits.
74AUP2G240GD,125 Features
Bus Driver/Transceivers
74AUP2G240GD,125 Applications
There are a lot of Nexperia USA Inc. 74AUP2G240GD,125 Buffers & Transceivers applications.
- Metro access rings
- Indoor ad hoc meeting
- interconnection between switches
- Switches/bridges/routers/servers
- Telecom and datacom networking applications
- Remote controls
- VoIP phones
- Broadcast application
- Point-to-point networking
- Fiber distributed data interface (FDDI)
