74AUP2G79DC,125
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-VFSOP (0.091, 2.30mm Width) |
| Number of Pins | 8 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2010 |
| Series | 74AUP |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| Type | D-Type |
| Technology | CMOS |
| Voltage - Supply | 0.8V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.2V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74AUP2G79 |
| Function | Standard |
| Output Type | Non-Inverted |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Number of Circuits | 2 |
| Output Current | 20mA |
| Clock Frequency | 309MHz |
| Propagation Delay | 25.6 ns |
| Turn On Delay Time | 2 ns |
| Family | AUP/ULP/V |
| Current - Quiescent (Iq) | 500nA |
| Current - Output High, Low | 4mA 4mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 5.8ns @ 3.3V, 30pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 0.6pF |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Positive Edge |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
74AUP2G79DC,125 Overview
It is packaged in the way of 8-VFSOP (0.091, 2.30mm Width). As part of the package Tape & Reel (TR), it is embedded. T flip flop uses Non-Invertedas its output configuration. The trigger configured with it uses Positive Edge. Surface Mountmounts this electrical part. A voltage of 0.8V~3.6Vis required for its operation. In the operating environment, the temperature is -40°C~125°C TA. This D latch has the type D-Type. This type of FPGA is a part of the 74AUP series. Its output frequency should not exceed 309MHz Hz. There is 500nA quiescent consumption. It has been determined that there have been 8 terminations. The 74AUP2G79 family contains this object. It is powered from a supply voltage of 1.2V. Input capacitance of this device is 0.6pF farads. Electronic devices of this type belong to the AUP/ULP/Vfamily. It is mounted in the way of Surface Mount. 8pins are included in its design. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. As soon as 3.6Vis reached, Vsup reaches its maximum value. The superior flexibility of this circuit is achieved by using 2 circuits. With an output current of 20mA, it is possible to design the device in any way you want. There are 1 output lines in this JK flip flop.
74AUP2G79DC,125 Features
Tape & Reel (TR) package
74AUP series
8 pins
74AUP2G79DC,125 Applications
There are a lot of Nexperia USA Inc. 74AUP2G79DC,125 Flip Flops applications.
- Clock pulse
- Frequency Dividers
- Registers
- Computing
- Shift registers
- Shift Registers
- Communications
- Individual Asynchronous Resets
- Automotive
- Circuit Design
