74AUP2G80GF,115
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-XFDFN |
| Number of Pins | 8 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2010 |
| Series | 74AUP |
| JESD-609 Code | e3 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| Type | D-Type |
| Terminal Finish | Tin (Sn) |
| Technology | CMOS |
| Voltage - Supply | 0.8V~3.6V |
| Terminal Position | DUAL |
| Supply Voltage | 1.1V |
| Terminal Pitch | 0.35mm |
| Base Part Number | 74AUP2G80 |
| Function | Standard |
| Output Type | Inverted |
| Number of Elements | 2 |
| Polarity | Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Clock Frequency | 309MHz |
| Propagation Delay | 27.2 ns |
| Turn On Delay Time | 2.2 ns |
| Family | AUP/ULP/V |
| Current - Quiescent (Iq) | 500nA |
| Current - Output High, Low | 4mA 4mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 6.4ns @ 3.3V, 30pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 0.6pF |
| Clock Edge Trigger Type | Positive Edge |
| Height Seated (Max) | 0.5mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
74AUP2G80GF,115 Overview
In the form of 8-XFDFN, it has been packaged. It is contained within the Tape & Reel (TR)package. In the configuration, Invertedis used as the output. The trigger configured with it uses Positive Edge. The electronic part is mounted in the way of Surface Mount. A voltage of 0.8V~3.6Vis used as the supply voltage. It is operating at -40°C~125°C TA. It is an electronic flip flop with the type D-Type. The 74AUPseries comprises this type of FPGA. A frequency of 309MHzshould not be exceeded by its output. There are 2 elements in it. There is 500nA quiescent consumption. Terminations are 8. The object belongs to the 74AUP2G80 family. A voltage of 1.1V provides power to the D latch. Its input capacitance is 0.6pF farads. This D flip flop belongs to the family of AUP/ULP/V. In this case, the electronic component is mounted in the way of Surface Mount. A total of 8pins are provided on this board. This device's clock edge trigger type is Positive Edge. In this case, the maximum supply voltage (Vsup) reaches 3.6V.
74AUP2G80GF,115 Features
Tape & Reel (TR) package
74AUP series
8 pins
74AUP2G80GF,115 Applications
There are a lot of Nexperia USA Inc. 74AUP2G80GF,115 Flip Flops applications.
- Automotive
- Parallel data storage
- Frequency Divider circuits
- Consumer
- Cold spare funcion
- Memory
- Shift registers
- Communications
- Individual Asynchronous Resets
- High Performance Logic for test systems
