74F112SJX
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.209, 5.30mm Width) |
| Number of Pins | 16 |
| Supplier Device Package | 16-SOP |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74F |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Type | JK Type |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Voltage - Supply | 4.5V~5.5V |
| Frequency | 105MHz |
| Base Part Number | 74F112 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Operating Supply Voltage | 5V |
| Number of Elements | 2 |
| Polarity | Non-Inverting |
| Number of Circuits | 2 |
| Max Supply Voltage | 5.5V |
| Min Supply Voltage | 4.5V |
| Number of Bits | 2 |
| Clock Frequency | 105MHz |
| Propagation Delay | 6.5 ns |
| Turn On Delay Time | 5 ns |
| Logic Function | AND, Flip-Flop |
| Current - Quiescent (Iq) | 19mA |
| Current - Output High, Low | 1mA 20mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 6.5ns @ 5V, 50pF |
| Trigger Type | Negative Edge |
| High Level Output Current | -1mA |
| Low Level Output Current | 20mA |
| Number of Input Lines | 2 |
| Number of Output Lines | 3 |
| Clock Edge Trigger Type | Negative Edge |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
74F112SJX Overview
In the form of 16-SOIC (0.209, 5.30mm Width), it has been packaged. A package named Tape & Reel (TR)includes it. In the configuration, Differentialis used as the output. It is configured with a trigger that uses Negative Edge. There is an electric part mounted in the way of Surface Mount. The JK flip flop operates at 4.5V~5.5Vvolts. Currently, the operating temperature is 0°C~70°C TA. There is JK Type type of electronic flip flop associated with this device. It belongs to the 74Fseries of FPGAs. A frequency of 105MHzshould not be exceeded by its output. There are 2 elements in it. There is 19mA quiescent consumption. The 74F112family includes it. A part of the electronic system is mounted in the way of Surface Mount. The electronic flip flop is designed with pins 16. Its clock edge trigger type is Negative Edge. There are 2bits in its design. The superior flexibility of this circuit is achieved by using 2 circuits. In order to ensure high efficiency, the supply voltage should remain at 5V. There are no output lines on the JK flip flop. As of now, there are 2input lines. A -1mAvalue is set for the high level output current. It is set to 20mAfor the low level output current. A temperature below 70°Cshould be used for operation. A temperature above 0°Cshould be used for the operation. The minimal supply voltage is 4.5V. The maximum supply voltage supported by the flip flop is 5.5V. It is possible to achieve 105MHz frequencies.
74F112SJX Features
Tape & Reel (TR) package
74F series
16 pins
2 Bits
74F112SJX Applications
There are a lot of ON Semiconductor 74F112SJX Flip Flops applications.
- Memory
- Frequency Dividers
- Supports Live Insertion
- High Performance Logic for test systems
- Common Clocks
- Dynamic threshold performance
- Circuit Design
- ESD performance
- Storage registers
- Test & Measurement
