74F114PC
| Parameters | |
|---|---|
| Mount | Through Hole |
| Mounting Type | Through Hole |
| Package / Case | 14-DIP (0.300, 7.62mm) |
| Number of Pins | 14 |
| Supplier Device Package | 14-PDIP |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tube |
| Series | 74F |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Type | JK Type |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Voltage - Supply | 4.5V~5.5V |
| Frequency | 95MHz |
| Base Part Number | 74F114 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Number of Elements | 2 |
| Polarity | Non-Inverting |
| Number of Circuits | 2 |
| Max Supply Voltage | 5.5V |
| Min Supply Voltage | 4.5V |
| Clock Frequency | 95MHz |
| Propagation Delay | 7.5 ns |
| Turn On Delay Time | 5.5 ns |
| Logic Function | AND, D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 19mA |
| Current - Output High, Low | 1mA 20mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 7.5ns @ 5V, 50pF |
| Trigger Type | Negative Edge |
| High Level Output Current | 20mA |
| Low Level Output Current | 20mA |
| Number of Input Lines | 4 |
| Number of Output Lines | 2 |
| Clock Edge Trigger Type | Negative Edge |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
74F114PC Overview
The package is in the form of 14-DIP (0.300, 7.62mm). D flip flop is embedded in the Tube package. As configured, the output uses Differential. This trigger is configured to use Negative Edge. It is mounted in the way of Through Hole. The supply voltage is set to 4.5V~5.5V. A temperature of 0°C~70°C TAis used in the operation. It is an electronic flip flop with the type JK Type. This type of FPGA is a part of the 74F series. You should not exceed 95MHzin its output frequency. A total of 2elements are present in it. Despite external influences, it consumes 19mAof quiescent current. The 74F114family includes it. The electronic part is mounted in the way of Through Hole. It is designed with 14 pins. This device has Negative Edgeas its clock edge trigger type. In order to achieve its superior flexibility, 2 circuits are used. The JK flip flop is with 2 output lines to operate. As of now, there are 4input lines. In this case, the high level output current is set to 20mA. 20mA is the low level output current. It is recommended that the operating temperature be below 70°C. It is recommended that the operating temperature be greater than 0°C. It is powered by 4.5V as its minimum supply voltage. In this case, it supports a maximum supply voltage of 5.5V. 95MHzis the maximum frequency that can be achieved.
74F114PC Features
Tube package
74F series
14 pins
74F114PC Applications
There are a lot of ON Semiconductor 74F114PC Flip Flops applications.
- Event Detectors
- Convert a momentary switch to a toggle switch
- Balanced Propagation Delays
- Cold spare funcion
- Common Clocks
- Dynamic threshold performance
- High Performance Logic for test systems
- Shift Registers
- Data transfer
- Test & Measurement
