74F273SJ
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.209, 5.30mm Width) |
| Surface Mount | YES |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tube |
| Series | 74F |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | Matte Tin (Sn) |
| Technology | TTL |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Reach Compliance Code | unknown |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| JESD-30 Code | R-PDSO-G20 |
| Function | Master Reset |
| Qualification Status | Not Qualified |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Clock Frequency | 160MHz |
| Family | F/FAST |
| Current - Quiescent (Iq) | 44mA |
| Current - Output High, Low | 1mA 20mA |
| Output Polarity | TRUE |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 9ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Propagation Delay (tpd) | 9 ns |
| Width | 5.3mm |
| RoHS Status | ROHS3 Compliant |
74F273SJ Overview
As a result, it is packaged as 20-SOIC (0.209, 5.30mm Width). There is an embedded version in the package Tube. Currently, the output is configured to use Non-Inverted. It is configured with the trigger Positive Edge. This electronic part is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 4.5V~5.5V. In the operating environment, the temperature is 0°C~70°C TA. This electronic flip flop is of type D-Type. It is a type of FPGA belonging to the 74F series. It should not exceed 160MHzin terms of its output frequency. A total of 1elements are present in it. This process consumes 44mA quiescents. There have been 20 terminations. The power supply voltage is 5V. This D flip flop belongs to the family of F/FAST. In this case, the maximum supply voltage (Vsup) reaches 5.5V. The supply voltage (Vsup) should be maintained above 4.5V for normal operation.
74F273SJ Features
Tube package
74F series
74F273SJ Applications
There are a lot of Rochester Electronics, LLC 74F273SJ Flip Flops applications.
- Circuit Design
- Bounce elimination switch
- ESCC
- Clock pulse
- Latch
- High Performance Logic for test systems
- ESD protection
- Synchronous counter
- Buffered Clock
- Consumer
