74F374PC
| Parameters | |
|---|---|
| Mounting Type | Through Hole |
| Package / Case | 20-DIP (0.300, 7.62mm) |
| Surface Mount | NO |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tube |
| Published | 2011 |
| Series | 74F |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | MATTE TIN |
| Technology | TTL |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Peak Reflow Temperature (Cel) | NOT APPLICABLE |
| Supply Voltage | 5V |
| Terminal Pitch | 2.54mm |
| Reach Compliance Code | unknown |
| Time@Peak Reflow Temperature-Max (s) | NOT APPLICABLE |
| JESD-30 Code | R-PDIP-T20 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Number of Ports | 2 |
| Clock Frequency | 140MHz |
| Family | F/FAST |
| Current - Quiescent (Iq) | 86mA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 3mA 24mA |
| Output Polarity | TRUE |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 8.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Length | 26.075mm |
| Width | 7.62mm |
| RoHS Status | ROHS3 Compliant |
74F374PC Overview
It is packaged in the way of 20-DIP (0.300, 7.62mm). A package named Tubeincludes it. This output is configured with Tri-State, Non-Inverted. In the configuration of the trigger, Positive Edgeis used. There is an electronic component mounted in the way of Through Hole. A voltage of 4.5V~5.5Vis used as the supply voltage. The operating temperature is 0°C~70°C TA. The type of this D latch is D-Type. It is a type of FPGA belonging to the 74F series. You should not exceed 140MHzin its output frequency. In total, it contains 1 elements. There is 86mA quiescent consumption. Terminations are 20. The power supply voltage is 5V. It is a member of the F/FASTfamily of D flip flop. It reaches 5.5Vwhen the supply voltage is maximal (Vsup). It is imperative that the supply voltage (Vsup) is maintained above 4.5Vin order to ensure normal operation. The flip flop has 2ports embedded within it.
74F374PC Features
Tube package
74F series
74F374PC Applications
There are a lot of Rochester Electronics, LLC 74F374PC Flip Flops applications.
- CMOS Process
- Synchronous counter
- Test & Measurement
- Shift registers
- Shift Registers
- Memory
- Control circuits
- Parallel data storage
- ESD protection
- Safety Clamp
